PI noise

[Ferric Toes]

Thanks for the reply.

Tried the switch both places with the 1C integrator and didn't see a difference in the noise but wondered if I was missing something. I think I understand the 1C integrator, gain=R fdbk/R in*sample rate*sample time, frequency cutoff=1/2pi/R fdbk/C fdbk. Tried to come up with the gain and frequency cutoff formulas for the 2C with hold. Sample time wasn't in the gain formula but was in the frequency cutoff formula so I didn't see how to do GEB. What are the gain and frequency cutoff formulas for the 2C with hold?

green

I would have to try and find my notes from many years ago for the 2C with hold. Not easy. Frequency cutoff is varied by the internal
loop gain, the more gain the higher the cutoff frequency. I seem to remember that the integrator gain remained the same.
How have you done GEB so far?

Eric.

[green]

If you are using a CMOS 4066, or similar, it is what is known as a bilateral switch in that it can conduct either way and input and output can be swapped. The switching function is obtained by +Vdd or -Vss on the control gate. In my case, I normally use +5V and -5V for the RX rails and signal ground at 0V. The same supplies are for the CMOS, which means that you can put the gate where you like, either before the integrator input resistor or after. If you want the hold arrangement then it has to be after, so as to isolate the capacitor from the feedback resistor. I prefer the hold arrangement as there is less leak down of the capacitors as the parallel resistor is out of circuit. Good capacitors (matched in the case of 2C) are a must and also an opamp with very low input bias current.

Either the 1C or the 2C can be used for GEB but you have to do a polarity inversion somewhere to subtract out the ground signal. You can do it in the preamp by the addition of an inverter using a 1C. Or do it in the integrator by using the 2C. Three or four sample pulses are required to sample the decay signal at different points in time and on the GEB channel you normally require additional gain, hence the noise issue.

Eric.

Thanks for the reply.

Tried the switch both places with the 1C integrator and didn't see a difference in the noise but wondered if I was missing something. I think I understand the 1C integrator, gain=R fdbk/R in*sample rate*sample time, frequency cutoff=1/2pi/R fdbk/C fdbk. Tried to come up with the gain and frequency cutoff formulas for the 2C with hold. Sample time wasn't in the gain formula but was in the frequency cutoff formula so I didn't see how to do GEB. What are the gain and frequency cutoff formulas for the 2C with hold?

green

[Ferric Toes]

Hello Eric !
Do you's 4066 Better from J113 as in the case gs 4 ?

Hi Orbit,
Yes, I have not used J113/J112 as analogue switches for a long time. They had to be matched for ON resistance whereas 4066 has 4 switches in one package so the match is already good. The rest of the pulse generator driving the 4066 needs to be between +5 and -5 rails.

Eric.

[Orbit]

Hello Eric !
Do you's 4066 Better from J113 as in the case gs 4 ?

[Ferric Toes]

Two questions.(1)Is there a better place to connect the switches with a 1C integrator, between the preamp and integrator input resistors or between integrator input resistors and integrator - input? (2)Can you do GEB with a 2C integrator, with hold or normal?

If you are using a CMOS 4066, or similar, it is what is known as a bilateral switch in that it can conduct either way and input and output can be swapped. The switching function is obtained by +Vdd or -Vss on the control gate. In my case, I normally use +5V and -5V for the RX rails and signal ground at 0V. The same supplies are for the CMOS, which means that you can put the gate where you like, either before the integrator input resistor or after. If you want the hold arrangement then it has to be after, so as to isolate the capacitor from the feedback resistor. I prefer the hold arrangement as there is less leak down of the capacitors as the parallel resistor is out of circuit. Good capacitors (matched in the case of 2C) are a must and also an opamp with very low input bias current.

Either the 1C or the 2C can be used for GEB but you have to do a polarity inversion somewhere to subtract out the ground signal. You can do it in the preamp by the addition of an inverter using a 1C. Or do it in the integrator by using the 2C. Three or four sample pulses are required to sample the decay signal at different points in time and on the GEB channel you normally require additional gain, hence the noise issue.

Eric.

[green]

Two questions.(1)Is there a better place to connect the switches with a 1C integrator, between the preamp and integrator input resistors or between integrator input resistors and integrator - input? (2)Can you do GEB with a 2C integrator, with hold or normal?

[Ferric Toes]

1C integrtors require a fast op amp, or otherwise they can't cope with charge injection pulses. I'd expect this to be noisy. A minipulse differential integrator is an interesting solution, but it requires a fast op amp, as it combines 1C (inverting) and 2C (non-inverting) paths. Charge injection may be flattened a bit by adding gate resistors (gate stoppers) so that garden variety op amps may work well here. Otherwise, aim for op amps with well over 1 MHz gain bandwidth product.
Eric, thanks for the C12 tip. I wouldn't use tantals though - too unpredictable, and also slavery promoting. Your anagram is so cool, but mine is better...

Vodka Rivers

You are a savvier Dork than I thought. Yes, rivers of Vodka are much better than rusty toes.

I haven't found charge injection from the gate drive to be a problem. In the Minipulse days things were not too critical but even in later designs with delays and sample pulses of just a few uS I didn't see a big problem. The fast spikes at the beginning and end of the sample could be seen on a scope but disappeared if you followed the integrator with a simple RC LP filter. Provided the gate drive is low impedance both ways then the charge injection is followed by charge suction, therefore the effect cancels. This is the situation with CMOS gates using a + and - supply. At least that is my story.

Erotic Serf.

[Davor]

1C integrtors require a fast op amp, or otherwise they can't cope with charge injection pulses. I'd expect this to be noisy. A minipulse differential integrator is an interesting solution, but it requires a fast op amp, as it combines 1C (inverting) and 2C (non-inverting) paths. Charge injection may be flattened a bit by adding gate resistors (gate stoppers) so that garden variety op amps may work well here. Otherwise, aim for op amps with well over 1 MHz gain bandwidth product.
Eric, thanks for the C12 tip. I wouldn't use tantals though - too unpredictable, and also slavery promoting. Your anagram is so cool, but mine is better...

Vodka Rivers

[green]

Lately I've been using an integrator and two post amp stages with a .01usec feed back TC each stage followed by a negative absolute value and a 2.3Hz 5pole butter worth filter. Recorded some scope pictures with the integrator and post amp feedback TC changed to .033usec without the abs. value and 5 pole filter. R7 and C4 are the feedback RC for the integrator, 10k input resistors in series with input switches(1C integrator). A photo cell was mounted 8 inches above the coil, a 200mm diameter disk was glued to the bottom of the water bottle swinging from a pendulum, US nickel stuck to the disk. 200mm/.2second=1meter/second. The nickel swings across one end or from end to end across both. Bottle was pulled back about 18 inches and let go then caught on the rebound, crosses coil twice, I think I like the circuit without the absolute value and 5 pole better.

[Ferric Toes]

It's about time for a massive clear-up.

That's what my wife is telling me.

[Ferric Toes]

I just checked on the Garrett XL500 Seahunter schematic and the relevant capacitor they substituted was 0.1uF which was seriously too small.

Eric.

[Qiaozhi]

Where a problem can arise is if the coupling capacitor (C12 in the MPP circuit) is too low a value. In the original MP it was 22uF, while in the MPP it is 0.47uF. The Garrett XL500, for which I designed the circuit, had EF problems for the same reason; they substituted a low value capacitor for the larger one I originally used. Luckily I checked an early production one and wrote a report for Charles Garrett.

If you scope across R19, with the 0.47uF, you will likely see that the pulsed waveform no longer has a flat d.c baseline but is a ramp. You need a flat, or substantially flat baseline to get good EF cancellation, so it is either a big capacitor or direct coupling. In the MP I used a tantalum capacitor and offset the preamp output to -0.5V to give the capacitor a bit of dc bias.

I cannot recall why C12 was decreased from 22uF to 470nF, but there is no issue with cancelling the EF.
Perhaps someone else can experiment with this, as I'm up to my eyeballs in other work, and the MPP is buried under a heap of stuff.
It's about time for a massive clear-up.

[Ferric Toes]

I've been in communication with Teleno concerning this problem, but it doesn't appear to be anything to do with the EF.

Being absent from the Forum for a while, I have not followed the Minipulse Plus thread and what changes/improvements have been made. I have only just looked at the schematic and done some quick comparisons with the Minipulse B schematic of January 1989. I will say, however, that there was never a problem with EF with the integrate and hold circuit that I started to use around that time. The same arrangement was also used in the Superscan and the waterproof Aquastar when they were in production.

Where a problem can arise is if the coupling capacitor (C12 in the MPP circuit) is too low a value. In the original MP it was 22uF, while in the MPP it is 0.47uF. The Garrett XL500, for which I designed the circuit, had EF problems for the same reason; they substituted a low value capacitor for the larger one I originally used. Luckily I checked an early production one and wrote a report for Charles Garrett.

If you scope across R19, with the 0.47uF, you will likely see that the pulsed waveform no longer has a flat d.c baseline but is a ramp. You need a flat, or substantially flat baseline to get good EF cancellation, so it is either a big capacitor or direct coupling. In the MP I used a tantalum capacitor and offset the preamp output to -0.5V to give the capacitor a bit of dc bias.

Today, with better I.C.s and tighter component tolerances, I generally couple the preamp to the integrator input without a blocking capacitor. With good balance in the differential integrator any small offset changes in the preamp cancel out anyway.

Eric.

[Qiaozhi]

Teleno is having problems with EF with his Minipulse-plus. It has an integrator like the one you suggested.

I've been in communication with Teleno concerning this problem, but it doesn't appear to be anything to do with the EF.

[green]

This is an arrangement that works well. It has the benefit that the capacitors 'hold' until the next sample i.e. there is no leak down through a parallel resistor.

In the differential version the loop gain controls the time constant, so you can have an external pot to vary the 'response speed' or 'noise averaging'.

[ATTACH]36677[/ATTACH]

Eric.

http://www.geotech1.com/forums/showthread.php?21236-Replies-to-Minipulse-Plus&p=219118#post219118

Teleno is having problems with EF with his Minipulse-plus. It has an integrator like the one you suggested. I've had problems cancelling EF with a normal 2C integrator. Does the 2C with hold have the same problems? Looks like you can't do GEB by adjusting ground sample time like can be done with a 1C integrator, maybe I'm wrong.