Ground Balance

[Carl-NC]

Yes, I would use a magnet.

[Mick-GD]

How are you testing for EF cancellation?

Coil movement in a horizontal plane.

Could you use a big magnet waved horizontal ?

[Carl-NC]

How are you testing for EF cancellation?

[Mick-GD]

Normally you want the EF sample to match the main sample, that is, have the same gain and sample width. The idea being that the Earth field response is reasonably identical across the pulse period. Your adjustment method would probably work well for the GB sample, however.

Hi Carl, the first circuit I made used a unity gain inverting stage then for the adjustment I tried a lower value variable resistor 500ohms but for some reason couldn't get the EF to balance out, I then put a 10k in and got it to adjust to about mid point on the pot but then lost gain on the main sample channel due to the extra resistance. When I added gain to the inverting stage I was able to turn the pot more to the main sample channel thus having less resistance between it and the input of the integrator.

The main sample at moment is set to 8us and the EF1 sample I pushed out to 200us.

Any other ideas would be grateful



Cheers
Mick-GD

[Carl-NC]

The second inverted output going to the 4066 has extra gain to compensate for a lower level of signal plus it allow the 10k pot to be adjusted more towards the S1 sample point, and this gives more response to wanted targets.

Normally you want the EF sample to match the main sample, that is, have the same gain and sample width. The idea being that the Earth field response is reasonably identical across the pulse period. Your adjustment method would probably work well for the GB sample, however.

[Davor]

The way I see it - it is a weighted sampling. It must be interesting to see what set of weighting curves would produce the same result with arbitrary sampling. With proper weighting function it should work with large tolerance for timing errors.
(Just thinking out loud)

[Mick-GD]

+9 volts?

philip

Yep 9 volts. Although it will run fine on 12 or 14. The reason it was on 9 is because the 7660 I'm using to make the +5 volt line is only a 10 volt max version. Making a better +/- voltage circuit is one of my next jobs.

[hdphilip]

+9 volts?

philip

[Mick-GD]

Here's a picture of my first post frontend design, it had been breadboarded and does work but if anyone has any ideas for improvement any suggestions would be grateful.

All the components used are what I had in stock.

The second inverted output going to the 4066 has extra gain to compensate for a lower level of signal plus it allow the 10k pot to be adjusted more towards the S1 sample point, and this gives more response to wanted targets.

The next part is to add the GB and EF2 sample circuits, I'll post up when done.




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[hdphilip]

Mick

something I've been doing in my experimenting is checking the noise characteristic's of op-amp's verses gain, i downloaded "Tina Ti" from Texas instruments, easy to use, kinda fun!

Philip

[Mick-GD]

Hi Carl, thanks for the added info. Some time back I was looking at the SD2000 schematics posted in another location and I see they do pretty much the same in that they invert the output of the preamp and feed feed the inv and non inverting inputs into the 4066 and use a variable resistor on the output of each channel for balance then the output connects to the integrator. So I might go down that path.

Time for some experimenting.

[Carl-NC]

Generally (even in VLF) you want the integrators to be tightly matched, which usually means hand-matching at least the caps. The more integrators you have, the harder it is to get them all to match. By running 2 samples into a single integrator you reduce the problem.

However, a differential integrator (as is used in HH) uses 2 caps which need to match (although I never really said so in the documentation), so it is no better than using 2 separate integrators. A better (often used) method is to first invert the preamp output, then gate the normal and inverted signals into a single-ended integrator.

In a TDI-style GB design, if you don't match the delays through both analog paths then you will never be able to hit a quiet GB point.

- Carl

[Mick-GD]

Hi Taktyk, thanks for the timing picture.

With the EF sample points I'm going to try sampling them further out and just before the beginning of the next TX cycle, doing this would lessen the chance of bigger rubbish targets being detected in the EF sample points.


Hi Carl, just a question about the diff integration in the HH, it uses one IC TL072 for both channels. Before I start experimenting with this section what are your thoughts on sampling into four separate integrators then into other IC's to diff the signals, good or bad idea.





Cheers
Mick-GD

[Carl-NC]

Yup!

[Taktyk]

HI,

This idea is more or less like the picture?

Regards
Taktyk