DEEPER PI DETECTION DEPTH

[Qiaozhi]

Now you see it, now you don't!

Here's a little mystery for you:
By the way, I'm not trying to be mysterious ... I don't know the answer either.

Have a look at the attached simulation. The left-hand circuit uses the standard LTSpice inductor model with a series resistance parameter of 3 ohms and a parallel capacitance parameter of 200pF. Whereas the right-hand circuit (a direct copy of circuit 1) has been modified, with the LTSpice inductor model having only the inductance value specified, and the series resistance and parallel capacitance realised with discrete parts.

Theoretically there should be no difference in the simulation results ... but there is!

At 10us, when the mosfet is turned on, there is a small glitch in I(L1), and two other glitches after the mosfet is turned off. However, none of these gitches are present in I(L3).

Why?????

You can try removing the zener diodes across the mosfets if you wish, but it just makes the glitches bigger.

Something for you to ponder over.

P.S. Just noticed that I used a conventional diode symbol for the zener, but that's just a visual problem as it still works correctly.

[Carl-NC]

Now what if we were able to make a current pulse that is square wave, rather than the current pulse that we end up with, with the resistor in series with the coil.

So-called "constant-current PI" has some distinct advantages, and I urge folks to take a closer look at it. However, the series R is not the preferred way to do it.

[Carl-NC]

The expression "saturate" is often used, it could be changed to another expression often used,"fully charged", which is just as wrong, to say the the eddy currents have reached a maximum level.

In traditional PI, people use "fully charged" to actually mean "fully discharged." That is, the "on" eddies have died out.

[Carl-NC]

what is better:
Wasting high power for a long pulse duration (saturated TX coil current) or
wasting low power for multiple short pulses (collecting the signal response over multiple short pulses)?

Unfortunately there are advantages to either. E.g., what's better, a large coil or a small coil?

[Qiaozhi]

OK here's whats happening here, changing the parasitic capacitance of the coil is altering dV/dt which is effecting how much charge is transferred across to the gate of the mosfet, holding it open. Although 20pf of parasitic capacitance seems to make the effect dissapear in actual fact it makes it kick in so fast you don't even notice it. The 500pf actually reduces the amount of charge transferred which slows the time it takes to kick in giving a more obvious dip.

I decided to get a bit more familiar with this Ltspice thing to demonstrate what I'm talking about a bit better. I've got 3 shots in order, the 200pf original, 20pf followed by 500pf.
Trace colours:
Cyan = mosfet gate voltage
Red = gate current
Green=coil current
Notice how the gate voltage hangs around the 4v (gate threshold voltage) to a greater or lesser extent.

Actually, the real problem seems to be in the inductor model. The 200pF capacitance is in parallel with the inductor and its DC resistance, but it's an ideal capacitance model. i.e. no series resistance. This causes a huge current spike to appear across the inductor model when the mosfet (or switch) turns on.

I removed all parameters from the inductor, except the inductance of course; and inserted a resistor (3 ohm) in series with the coil with a capacitor (200pF) across it. In all cases - with or without mosfet - the glitch has disappeared.

However, as Carl discovered, there are some glitches there in practice, which implies that we need a more complex model, to make sure simulation matches reality. There most likely needs to be at least a capacitor for inter-winding capacitance and for the connecting cable, etc. ... but don't forget all the other parameters on the capacitor (such as equivalent series resistance and inductance; and equivalent parallel resistance and capacitance).

Obviously there are some issues with charge across the gate of the mosfet, but that's not the whole story. Have a look at the attached simulation, and you'll see the glitches are not there. The bottom line is that there's no way to add an equivalent series resistance to the parallel capaitance in the inductor properties. The best way to solve this would be to create a subcircuit for the coil, and not rely on the LTSpice model alone.

[Tinkerer]

OK here's whats happening here, changing the parasitic capacitance of the coil is altering dV/dt which is effecting how much charge is transferred across to the gate of the mosfet, holding it open. Although 20pf of parasitic capacitance seems to make the effect dissapear in actual fact it makes it kick in so fast you don't even notice it. The 500pf actually reduces the amount of charge transferred which slows the time it takes to kick in giving a more obvious dip.

I decided to get a bit more familiar with this Ltspice thing to demonstrate what I'm talking about a bit better. I've got 3 shots in order, the 200pf original, 20pf followed by 500pf.
Trace colours:
Cyan = mosfet gate voltage
Red = gate current
Green=coil current
Notice how the gate voltage hangs around the 4v (gate threshold voltage) to a greater or lesser extent.

Thanks Midas,

Now, how do we fix it?

Tinkerer

[Tinkerer]

Tinkerer,

just define each coupling coefficient by making more K-statements.
K1 L1 L2 0.0001
K2 L1 L3 0.0001
K3 L1 L4 0.01
K4 L2 L3 ..
K5 L2 L4 ..
K6 L3 L4 ..
..

Note, that if you have n coupled coils, you have to define n*(n-1)/2 coupling coefficients.
n=2: -> 2*1/2 = 1 -> 1 K statement
n=3: -> 3*2/2 = 3 -> 3 K statements
n=4: -> 4*3/2 = 6 -> 6 K statements () (see above example for n=4)
n=5: -> 5*4/2 = 10 -> 10 K statements ()
and so on

Cheers,
Aziz

Thanks Aziz,

I get the error message: Mutual inductance card missing.

Tinkerer

[Aziz]

Thanks Aziz,

this is a great help.

While we are at it, could you tell me how to make different inductance coupling:

I have: K1 L1 L2 L3 L4 L5 L6 0.0001, where all inductors have the same coupling. I want to add a Bucking coil, where the k factor is different to the RX coil from the TX coil.

I tried and crashed the LTSpice about 20 times. Could you please help me?

Thanks

Tinkerer

Tinkerer,

just define each coupling coefficient by making more K-statements.
K1 L1 L2 0.0001
K2 L1 L3 0.0001
K3 L1 L4 0.01
K4 L2 L3 ..
K5 L2 L4 ..
K6 L3 L4 ..
..

Note, that if you have n coupled coils, you have to define n*(n-1)/2 coupling coefficients.
n=2: -> 2*1/2 = 1 -> 1 K statement
n=3: -> 3*2/2 = 3 -> 3 K statements
n=4: -> 4*3/2 = 6 -> 6 K statements () (see above example for n=4)
n=5: -> 5*4/2 = 10 -> 10 K statements ()
and so on

Cheers,
Aziz

[Midas]

The oscillation is due to the parasitic capacitance of the coil. ie. inter wire capacitance, coil to shield capacitance and cable capacitance.

I used 200pf parallel capacitance to the 300uH inductance to simulate this.

If you change the simulation for 500pf parallel capacitance, the glitch increases. If you change it to 20pf it disappears.

Tinkerer

OK here's whats happening here, changing the parasitic capacitance of the coil is altering dV/dt which is effecting how much charge is transferred across to the gate of the mosfet, holding it open. Although 20pf of parasitic capacitance seems to make the effect dissapear in actual fact it makes it kick in so fast you don't even notice it. The 500pf actually reduces the amount of charge transferred which slows the time it takes to kick in giving a more obvious dip.

I decided to get a bit more familiar with this Ltspice thing to demonstrate what I'm talking about a bit better. I've got 3 shots in order, the 200pf original, 20pf followed by 500pf.
Trace colours:
Cyan = mosfet gate voltage
Red = gate current
Green=coil current
Notice how the gate voltage hangs around the 4v (gate threshold voltage) to a greater or lesser extent.

[Aziz]

G'day Aziz,

The method that finds big chunks of gold of course

For big gold I am leaning toward the longer slower pulse as it will take longer for the eddy currents to build and decay during the on time. The higher the current in the target after the coil current has reached 0 the better well thats my thoughts anyway.

Cheers Mick

Hi Mick,

The method that finds big chunks of gold of course

Then you have to know the answer to the question.

The interesting question is:
What is better? (Or is it the same = no free lunch?)
A saturated long TX pulse or an un-saturated multiple short pulses (TX t-on < TX TC)?

The question is addressed to all members of course. Who want's to win an IQ-award?
(I am biased - I'm not allowed to (win/)loose - what a luck )

Cheers,
Aziz

[Qiaozhi]

The oscillation is due to the parasitic capacitance of the coil. ie. inter wire capacitance, coil to shield capacitance and cable capacitance.

I used 200pf parallel capacitance to the 300uH inductance to simulate this.

If you change the simulation for 500pf parallel capacitance, the glitch increases. If you change it to 20pf it disappears.

Tinkerer

It seems you've found the cause of the glitches.

I modified the simulation (with the ideal switches) by removing the 200pF parallel cap across the coil(s). The glitches have vanished. However, they were still there (slightly) when reduced to 20pF.

[Tinkerer]

=Supply current/voltage


=Supply frequency

A target (coil) has an impedance, which is frequency dependent.

Aziz

PS: To see the induced voltage behaviour at the receiver coil, just replace the I(L3) by d(I(L3)). d() is the first derivation of the term in brackets.

PPS:
A high stimulation frequency will lead to a lower target eddy current (due to impedance). On the other hand, the RX coil would see more induced voltage due to higher eddy current change dI/dt.
So, where is the free lunch?

Thanks Aziz,

this is a great help.

While we are at it, could you tell me how to make different inductance coupling:

I have: K1 L1 L2 L3 L4 L5 L6 0.0001, where all inductors have the same coupling. I want to add a Bucking coil, where the k factor is different to the RX coil from the TX coil.

I tried and crashed the LTSpice about 20 times. Could you please help me?

Thanks

Tinkerer

[Tinkerer]

G'day Aziz,

The method that finds big chunks of gold of course

For big gold I am leaning toward the longer slower pulse as it will take longer for the eddy currents to build and decay during the on time. The higher the current in the target after the coil current has reached 0 the better well thats my thoughts anyway.

Cheers Mick

The difference in power consumption is very large. 2.4W compared with 17.3W.

Tinkerer

[Tinkerer]

Can you attach your latest simulation file if you updated? I'm not sure I'm looking at the exact same data. Does Qiaohzi file have all your latest changes in it? His is the easiest to use to compare for some questions.

I think we have to keep in mind the di/dt of it all. The current in the target I think should be driven the di/dt of the current in the TX coil. The current in our MD RX coil will be driven by the di/dt of the current in the target. We have double differentiation here the way I see it.



Basically yes, but... The reason the slow target current is still increasing in magnitude is that it is far from saturated and the TX slope is almost constant.

However, the slope of the sawtooth is actually decreasing at a slow rate.

The reason the fast target starts decreasing when it does is because it is tracking the slope of the TX current much faster (than the slow target) and, although it does not completely "saturate" (of course it takes infinite time to completely saturate) to the initial slope of the TX current, it actually grows higher than for the slope of the TX current later on (sorry for that head-scratcher). So it starts tracking down to be proportional to the reduced slope of the TX current.

(Use photoshop and draw a line from the start to the end of the sawtooth ramp and you can see how it is decreasing in slope.)

If the TX current was a perfect linear ramp, even the fast target should be still increasing and approaching a constant level, and naturally way ahead of the slow target.

Pretty sure I got that right...



My own personal intuition is that our RX coils will respond like a "secondary target", so they will be driven by the di/dt of the target current and respond according to their own dynamics (which is second-order, not first-order like normal targets).

Looking at the graphs, I think it really is more a matter of how big a jump and how fast the target current changes on its wild ride, which wouldn't seem to depend much on the direction the its eddy currents are flowing, more on the level they are currently at if anything (although it doesn't seem to depend very strongly on that either).

We really need to add the RX signal response to these simulations and look at that, not just the target signal.

-SB

The linear ramp. Yes, the ramp is not linear and that is the most probable cause. I will make a different sim with a flatter ramp to see if this will show a difference.

The only thing changed on my sim, is the gate resistor to make the 2 sims equal.

Qiaozih's simulation is very different.

Tinkerer

[Tinkerer]

US nickel and US silver dollar, whatever they are.



Agree, below is a real oscope plot (using my nifty new Rigol) of my test circuit, upper trace is the coil current. Glitch disappears when 100 ohms is added to the gate, which slows down the slew rate.

- Carl

The oscillation is due to the parasitic capacitance of the coil. ie. inter wire capacitance, coil to shield capacitance and cable capacitance.

I used 200pf parallel capacitance to the 300uH inductance to simulate this.

If you change the simulation for 500pf parallel capacitance, the glitch increases. If you change it to 20pf it disappears.

Tinkerer