SBG-PID

[dbanner]

This is how it was meant to be, I think. Now I can make out it is a pass transistor. Circuits are easier to follow when drawn properly.

[dbanner]

[dbanner]

I noticed error a transistor VT9 is connected back. Please for excuse.[ATTACH]46087[/ATTACH]

yes

[pito]

What you are trying to achieve ?

[dbanner]

the circuit comprising (Q1,Q2,Q3) VT6,VT7and VT9 I cannot give a reason for it.

[dbanner]

change 15K to 5K as in schematic on first post. LTspice results: V+ 12V V- 2V and split rail at 7V. So 5V either side of virtual ground. Seems good. Sacho schematic appears to be correct or am I missing something.

[dbanner]

[dbanner]

You're right. I'm having a closer look at the schematic.

[Altra]

Dbanner is v1 in your sim -9v or -12v? It should -12 and regulated between -9 to 10v on the negative rail.

[aft_72005]

THIS WORKS.

but with this configuration Q3 bias is reverse

[dbanner]

THIS WORKS.

[dbanner]

This works, note orientation of Q3.

[Carl-NC]

but with this configuration .. out pout drop to 4.7V+...4.7V-

Yes, this is correct.

Add try reversing VT 9 /Q3 collector and emitter and see what output voltage you get.

That's not correct, and the original SBG schematic appears to have VT9 backwards. It will still work (sort of), but the beta will be about 2 instead of 100+.

[aft_72005]

That looks more correct than the first sim. It will work fine on -9.4V.

Add try reversing VT 9 /Q3 collector and emitter and see what output voltage you get.

did this test out put drop to 3.18V+...3.8V - . this configuration not correct .

[Altra]

That looks more correct than the first sim. It will work fine on -9.4V.

Add try reversing VT 9 /Q3 collector and emitter and see what output voltage you get.