FET switches

[dbanner]

sorry rick. sorry for jim pough. he is full idiot if used 2n5485 in detector.

2n7000 is a mosfet not junction. However, with bias changes it could be made to work.

you must learn bara sch more attentionally if do not see bias in it.

No, no. Jim is not idiot. I simply cut and paste Jfet symbol from other part of schematic. The label was meant to be changed to a suitable transistor.
It is just a concept drawing.

[kt315]

The 2N5484 (among other things) is specified for high speed sample and hold (on 1 spec sheet), but also has graphs of characteristics for rf work. This does not preclude its use as a switch.

sorry rick. sorry for jim pough. he is full idiot if used 2n5485 in detector.

2n7000 is a mosfet not junction. However, with bias changes it could be made to work.

you must learn bara sch more attentionally if do not see bias in it.

[waltr]

Waltr, you maybe can help me advice on how to mod at3 circuit for use with fet? here is my layout along with the gold bug i am working on

Is it is the 2n5484 JFETs that you added (instead of 4066)?
If so then from the data sheet Vgs (off) is -3.0V.
What was the Voltage to the 4066 to turn switch Off and ON. Is the polarity the same?
What is the Voltage from op-amps that drive the JFET gates?

Or is it the 2n4392 JFETs? These require -5V to fully turn off.
Same questions.

The other consideration is What is the Voltage at the JFET's source. The gate is referenced to the source so for OFF the gate must be the Vgs(off) Voltage lower than the source. For ON the gate must be equal to or higher than the Voltage on the source. what makes this a little harder is that there is a variable signal on the JFET's Source so you must ensure the Gate Voltage goes high and low enough.

On my HH2 I put a pull-up from gate to +5V then an NPN to pull gate down to -12V. This is due to signal at Source going +/-4V so Gate Voltage always ensures full on/off.

If you are not sure then prototype the JFET switch circuit and measure. It is much easier to make change on a plug-in protoboard than on a PCB.

[kt315]

add a resistor 1k parallel to the speaker. then connect switch contacts to one of speaker wires you will disconnect it.

[dbanner]

So I need to put transistor drivers between gate of FET's and phase shifter? Ok, I see. Or change 100k resistors to maybe 22k?

[dbanner]

The challenge for completing the gold bug layout is to squeeze the audio driver circuit unto little remaining space.

[dbanner]

The JFET Gates can not be drive with digital logic Voltage levels like the 4066.
N-ch JFETs need -8 to -12V to full turn off. I used JFETs in my version of the Hammer Head (see "my take on the HH" in the HH II sub-furom for schematic). There I used npn transistors to switch the JFET gates from digital logic.

Waltr, you maybe can help me advice on how to mod at3 circuit for use with fet? here is my layout along with the gold bug i am working on

[waltr]

I like your choice of words.
Very good knowledge of specific topic of FET.
Now someone can explain my question about replacing 4066 with simple FET. Can I swap out the 4066 switches at the end of the phase shifter and replace directly for FET?
I made superb layout for Garrett AT3, but I replaced the 4066 with FET's to save space on PCB.

The JFET Gates can not be drive with digital logic Voltage levels like the 4066.
N-ch JFETs need -8 to -12V to full turn off. I used JFETs in my version of the Hammer Head (see "my take on the HH" in the HH II sub-furom for schematic). There I used npn transistors to switch the JFET gates from digital logic.

[dbanner]

The layout is super layout! It is not the same one I posted before, it is much more compact. The circuit is supposed to deliver nice bell tone for coins and such.
Also, I have super layout for Fisher gold bug. I want to make use of extra switches on the 4053 to make add on daughter board for iron reject.
I am very proud of the layout I created, it is truly a work of art.

[dbanner]

2n7000 is a mosfet not junction. However, with bias changes it could be made to work. Given that discrete fet switches are almost always junction type, there is probably a good reason for the choice. The 2N5484 (among other things) is specified for high speed sample and hold (on 1 spec sheet), but also has graphs of characteristics for rf work. This does not preclude its use as a switch.

As long as the gate driving voltage can reach saturation and cutoff levels it should work. Realistically, almost any N type junction fet would work as long as its voltage/current ratings are not exceeded. The requirements for a metal detector are less critical than a high speed sample/hold for a 16 bit a/d.

Right now chuubabas problems are a LOT worse than the choice of the fet switch. This is all a bit like the joke about rearranging the deck chairs as the Titanic goes down.

I like your choice of words.
Very good knowledge of specific topic of FET.
Now someone can explain my question about replacing 4066 with simple FET. Can I swap out the 4066 switches at the end of the phase shifter and replace directly for FET?
I made superb layout for Garrett AT3, but I replaced the 4066 with FET's to save space on PCB.

[rickb]

Depending on the voltage levels present in a typical sample and hold circuit, the fet may or may not turn completely on or off.

https://electronics.stackexchange.co...-or-vice-versa

n-channel enhancement MOSFET

This symbol shows you the inherent diode between drain and source.

N-channel enhancement devices need a voltage on the gate higher than the source in order to create a conduction channel. (Enhancement devices don't have a channel automatically, and need gate voltage to create one - because it's N-channel \$V_{gate} > V_{source}\$ for this to happen.)

P-channel enhancement devices need a voltage on the gate lower than the source in order to create a conduction channel. (Enhancement devices don't have a channel automatically, and need gate voltage to create one - because it's P-channel \$V_{gate} < V_{source}\$ for this to happen.)

N-channel delpetion devices have a channel by default, and need a voltage on the gate lower than the source in order to turn the channel off. The channel can be widened to a certain extent by increasing the gate-to-source voltage above 0.

P-channel depletion devices also have a channel by default, and need a voltage on the gate higher than the source in order to turn the channel off. The channel can be widened to a certain extent by decreasing the gate-to-source voltage below 0.
shar

Lets not worry about junction vs mos . His problem here is much more basic than that.

[kt315]

2n7000 is a mosfet not junction. However, with bias changes it could be made to work.
---
bias for what??? where you see bias in md schematics? examples?

[rickb]

2n7000 is a mosfet not junction. However, with bias changes it could be made to work. Given that discrete fet switches are almost always junction type, there is probably a good reason for the choice. The 2N5484 (among other things) is specified for high speed sample and hold (on 1 spec sheet), but also has graphs of characteristics for rf work. This does not preclude its use as a switch.

As long as the gate driving voltage can reach saturation and cutoff levels it should work. Realistically, almost any N type junction fet would work as long as its voltage/current ratings are not exceeded. The requirements for a metal detector are less critical than a high speed sample/hold for a 16 bit a/d.

Right now chuubabas problems are a LOT worse than the choice of the fet switch. This is all a bit like the joke about rearranging the deck chairs as the Titanic goes down.

[kt315]

look DB https://html.alldatasheet.com/html-p.../1/2N7000.html

[kt315]

FET's in metal detector used in SWITCH mode. ie no, nothing, difference what FET you use.
only working in two states -

1. OPEN STATE, break down, infinite resistance between SOURCE-DRAIN
2. CLOSED STATE, zero resistance (almost).
3. NO another state, ie so we recall that as 'active state' and looking specific haracterictics diagrams in the datasheets
trying to find up something 'differencies'.

4. only trigger signal goes on GATE, in logic schematics we recall it 'logic signal', ZERO and ONE,
is the signal, no the signal. TRUE and FALSE signal. Boolean algebra.

TRUE is '1'. high level TTL.
FALSE is '0'. gnd signal TTL, zero.

if we are working in computer environment or laptop we have logic algebra everywhere in them.

NO another signal in computer, just 0 and 1. TRUE and FALSE.