When FETs are used as switches, there is a difference between mixing-fast switches and power on/off switches. In both cases there is a small charge injected from gate to the channel, but it becomes bothersome only in mixing switches. CMOS switches are usually a bit better because of the charge injection cancelling between the N-channel and a P-channel MOSFETs involved. Sadly, it works well only if the common mode voltage is around the middle between Vdd and Vee.
So for mixing purposes it is good to use some kind of balanced mixer scheme, because charge injection gets cancelled in those.
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I go back to 4066 original design with small add on PCB with pinpointer part of circuit as well. These schematics are interesting, but not good idea to make without the original machine to examine.
I will focus only on DMC 2b. Better chance of success there.
I figured out how dmc2b coil is made. It is bifilar coil same as 1260x design. Ha ha! Easy peasy. Clue was the two fine balance loops on the 2b coil photos. The center tapped TX coil needs a feedback coil for each half plus the little extra loop for final balance. Just like the 1260x coilAttached Files
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Never considered it a problem since I typically draw and use schematics of many, many pages at all places I have worked.Other reason is when printed onto A size paper the schematic symbols and text is still readable. If on a larger schematic sheet then it gets reduced quite a bit when printed to A size.Originally posted by kt315 View Postyour schematic is unreadable. why you can not draw all in one schematic list?
my sch of KING COBRA is more than your in 3-4 times but it is on one list.
DP sch is more in 2-3 times than your but it is again on one list.
i do ALL for people they feeling themself comfortly looking my schematics. why you not???
I could spend a little bit of time and copy/paste all onto one page. This would work for publishing on this forum.
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your schematic is unreadable. why you can not draw all in one schematic list?Originally posted by waltr View Post
my sch of KING COBRA is more than your in 3-4 times but it is on one list.
DP sch is more in 2-3 times than your but it is again on one list.
i do ALL for people they feeling themself comfortly looking my schematics. why you not???
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I see here also on Garrett pulse machineAttached Files
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As I stated my HH II PI detector uses NPN to drive the JFET gates. The schematic can be found here:Originally posted by dbanner View PostThanks for the info. Very helpful, now I understand what are the considerations involved. I seem to remember a schematic which used transistors to drive the Jfet gates. I think it was a gold century schematic(gc-something)
A basic PI design incorporating a PIC micro for timing control, intended as a learning platform for using uC's.
A
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Problem with Mr Lhar schematic, they always have at least one error. Can't see anything obvious on this one.
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Or maybe I just revert to original design with 4066.
One thing for sure, the AT3 was a good performer.
I think this circuit is worth making. Adding a micro for VDI would be even better. But not sure if this can be done without having to make changes to original design.
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Thanks for the info. Very helpful, now I understand what are the considerations involved. I seem to remember a schematic which used transistors to drive the Jfet gates. I think it was a gold century schematic(gc-something)Originally posted by waltr View PostIs it is the 2n5484 JFETs that you added (instead of 4066)?
If so then from the data sheet Vgs (off) is -3.0V.
What was the Voltage to the 4066 to turn switch Off and ON. Is the polarity the same?
What is the Voltage from op-amps that drive the JFET gates?
Or is it the 2n4392 JFETs? These require -5V to fully turn off.
Same questions.
The other consideration is What is the Voltage at the JFET's source. The gate is referenced to the source so for OFF the gate must be the Vgs(off) Voltage lower than the source. For ON the gate must be equal to or higher than the Voltage on the source. what makes this a little harder is that there is a variable signal on the JFET's Source so you must ensure the Gate Voltage goes high and low enough.
On my HH2 I put a pull-up from gate to +5V then an NPN to pull gate down to -12V. This is due to signal at Source going +/-4V so Gate Voltage always ensures full on/off.
If you are not sure then prototype the JFET switch circuit and measure. It is much easier to make change on a plug-in protoboard than on a PCB.
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