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VLF MD with digital signal processing : Bee-Buzz 1

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  • Repwoc
    replied
    I am interested in this project because I have a similar project in the making, also based on a STM32 microcontroller.

    Originally posted by Atul Asthana View Post
    The system revolves around the STM32F103C8T6 microcontroller running at 72 MHz.
    Why have you decided on this chip? It is pretty low spec compared with other STM32 devices. I would say you would be much better off choosing one based on a Cortex M4 or M7 processor.rather than the Cortex M3 in the blue pill. The M3 doesn't have a math co-processor and the blue pill ADC is quite slow. Even the STM32F401CCU6 black pill has M4 processor, single precision floating point unit, much more memory (flash and SRAM), a much quicker ADC (2.4 x faster than the blue pill ADC, but still only 12 bits) and, significantly when you want to do DSP, dedicated DSP instructions using the CMSIS-DSP library. On the flip side, the black pill has only the one ADC whereas the blue pill has two and the black pill costs a little more. The STM32F411CCU6 is similar but has twice as much flash + SRAM and runs at 100 MHz. The STM32 Cortex M7 microcontrollers include a double-precision floating point unit and some have 16-bit ADCs.

    Originally posted by Atul Asthana View Post
    I was reading that its possible to apply goertzel algorithm on just one single cycle and get good enough results,
    Could you tell us where you read this? It looks more complex than a single-cycle instruction.
    https://www.st.com/resource/en/desig...lectronics.pdf .​

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  • Atul Asthana
    replied
    I agree that many improvements are possible. Its really great that we are all pooling our knowledge and expertise on this project :

    ​Averaging and SNR Improvement:

    You're correct about the SNR improvement from averaging. Averaging N samples improves the SNR by 10log₁₀(N) dB. Averaging 30 cycles (as you calculated) gives an SNR improvement of 10log₁₀(30) ≈ 14.8 dB, which is close to 15 dB. The 60 dB and 18 dB figures I mentioned earlier were in the context of different oversampling scenarios (averaging 8 samples per cycle to get from 12 bit to 15 bit resolution), not averaging multiple cycles. My apologies for the confusion.
    ​
    Loop Rate :

    With a loop rate of 512 slots per second (approximately 2 ms per slot), using 8 samples within each slot provides good resolution and the ability to detect fast-moving targets. If necessary, the number of samples per slot can be increased to 16 for further resolution improvement and number of slots can be reduced to 256.

    The ADC handling :

    Since every transmitted wave is being oversampled and each sample is being integrated over 8 cycles, using dma may make it easier. An interrupt driven, software managed process will probably be a simpler approach. Both approaches can be tried out.

    RTOS :

    Though, I did consider this, but I am not very sure about the overheads. I may have to reduce number of cycles and samples to fit everything in the slot.

    Tuning Tx Rx :

    Tuning tx rx tanks (actually varying the tx frequency) on every switch on is a good idea, however, the slight amount of detuning of the tanks is acceptable. Retuning every use cycle should be considered if the tanks are likely to detune by a large amount.

    in our case, the Q is not very high, and slight amount of detuning, will not make much of a difference.
    • Q of TX Tank (Q_TX): Approximately 10
    • Q of RX Tank (Q_RX): Approximately 5.3
    ​that implies : a 1% drop in power for frequency shift by 30 hz tx and 57 hz rx.
    for a hobby grade design, this drift can be tolerated.

    Driving tx coil

    The PWM signal driving the H-bridge generates the sine wave in the transmit LC tank circuit. Adjusting this PWM waveform allows for control of the transmit coil's power output.

    100 mw transmitted power refers to the power with which we illuminate the target. its used as a reference just to calculate the likely voltage generated on the receive coil.
    ​
    Primary objective

    The primary goal remains to maximize the usage of the capabilities of the low-cost, readily available, and widely used STM32F103C8T6 to create a "somewhat" commercial-grade VLF metal detector, while maintaining hardware and software simplicity.
    ​
    please comment to correct errors/misunderstandings and improve (and simplify) the design.
    Last edited by Atul Asthana; 12-24-2024, 08:03 AM.

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  • Carl-NC
    replied
    Originally posted by Atul Asthana View Post
    We'll sample the target signal around 512 times per second. For each sample, we'll use the Goertzel algorithm to get signal strength and phase, then smooth these values using digital filters. These smoothed values will be used to determine the target type (VDI) and generate output.​
    A typical loop rate in a digital metal detector is 200Hz. The higher the better until you run out of processing time. Personally, I'd start out conservatively at 200Hz. That is 5ms, and if the TX is 6kHz then you get an even 30 TX cycles in a single loop. It's not critical that the TX frequency is a whole multiple of the loop rate but it probably makes things easier. This allows you to average each of the 8 sample points 30 times for roughly a 15dB SNR improvement (not sure where you got 60dB from originally, or the 18dB above). Normally, the STM32 allows you to do background accumulation on the ADC for N samples but I think in this case you will have to do it manually because successive samples have to be binned differently. This should all be handled by DMA and a short interrupt handler so that other tasks can proceed. Which brings up the job of handling tasks. I would recommend running everything under FreeRTOS instead of trying to roll your own task handler.

    Reduced stress on the H-bridge transistors.
    I don't understand this. From post #1 it sounds like you want to drive the TX coil with a class D waveform, is that right?

    with 100 mW transmit power,
    I don't know what this means.

    ​
    To simplify coil tuning, we'll implement a frequency counter mode on the STM32 using a Colpitts oscillator. This will measure the resonant frequency of each coil. Ideally, the transmit frequency will be automatically adjusted to match the measured resonant frequency (within a few Hz of 6 kHz to avoid affecting filter and impedance calculations).​
    The White's TRX has an H-bridge TX driver that can be run in open-loop mode (self-driven) or driven by a TX clock. When the TRX is first turned on, it runs the TX in open-loop mode and measures the natural TX frequency. Then the micro drives the H-bridge at that frequency.

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  • Atul Asthana
    replied
    Originally posted by Skippy View Post
    Quote Carl: "Pretty much all these designs use a 24bit ADC, so a 12-bit ADC may prove to be a little light for this task"
    The whole thread contains useful info, if you take a look.
    thanks, noted. dithering could be incorporated, requires additional analog hardware.

    however, I am already oversampling the signal, and to further improve snr and resolution, I can sample 8 consecutive cycles, average out each of the points (8 points) of each cycle and use this averaged out 15 bit data of 8 points to feed to goertzel algorithm.

    this gives me an additional 18 dB improvement in SNR : means that the power of the noise is reduced by a factor of approximately 63 (10^(18/10)). In simpler terms, I can now detect signals that are 63 times weaker than with the 12-bit ADC, assuming the noise floor is the limiting factor.

    Presently, I still want to keep the MD simple, only using the stm32 peripherals: the 12 bit adc.
    will look at a 16 bit adc if this 12/15 bit doesnt work for this hobby machine.

    fot the kind of tid mentioned, I need to study equinox 800 in all its essence, and I think, I can relegate that to some time later.

    please opine.

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  • Skippy
    replied
    Quote Carl: "Pretty much all these designs use a 24bit ADC, so a 12-bit ADC may prove to be a little light for this task"

    My initial thoughts, too. As an example, the Teknetics T2 / Fisher F75 uses a 16-bit ADC with "dithering" to get about 2 bits extra. That is after an analogue front-end, so it's converting DC - 100Hz signals. The "dithering" is pseudo-random noise injection ( generated by the micro ), I recall 3 bits are used ( ie. a random number from 0 to 7 ) and then an average over 8 samples is taken.
    You really should be considering 14 bits + some "extra" [ pseudo-random noise injection / averaging etc ] as an absolute minimum.

    If you are after ideas for generating a Target ID value from your phase etc data, see this post:

    OK, here is a mini-challenge. Let's say you design a mixed analog/digital detector. You read in the X & R signals to the micro, and at some point you want to calculate the magnitude and phase. Mathematically, they are: Mag = \sqrt{X^2 + R^2} Ph = arctan(\frac{R}{X}) ​ However, these can be slow calculations in a micro.



    The whole thread contains useful info, if you take a look.
    Last edited by Skippy; 12-23-2024, 02:10 PM.

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  • Atul Asthana
    replied
    So, please comment on the following :

    Let's discuss the software and hardware design of this VLF metal detector, aiming for simplicity and efficient use of the STM32 Blue Pill.

    Software Considerations:

    We need to ensure the microcontroller can process data quickly enough. The processing involves:
    1. Generating the transmit signal (PWM).
    2. Sampling the received signal 8 times per cycle.
    3. Calculating signal strength and phase using the Goertzel algorithm.
    4. Filtering the signal strength and phase.
    5. Checking and responding to user input (switches).
    6. Updating the display and generating audio tones.
    7. Sending data via serial communication.
    8. (Optional) Reading GPS data.
    I was reading that its possible to apply goertzel algorithm on just one single cycle and get good enough results, since we are using a filtered single frequency. and single cycle processing can be done within 2-4 microseconds, giving us a lerway of about 1.9 milliseconds for rrst of the tasks.Since we're working with a filtered, single frequency (6 kHz), the Goertzel algorithm can be efficiently applied to just one cycle of the received signal. This single-cycle processing is estimated to take only 2-4 microseconds, leaving approximately 1.9 milliseconds for other tasks within each sampling period (assuming a sampling rate around 512 Hz). This significantly reduces the computational burden.

    We'll sample the target signal around 512 times per second. For each sample, we'll use the Goertzel algorithm to get signal strength and phase, then smooth these values using digital filters. These smoothed values will be used to determine the target type (VDI) and generate output.

    This approach offers several advantages:
    1. Lower power consumption.
    2. Sufficient processing time. Using a simplified (fixed-point) Goertzel algorithm avoids complex calculations.
    3. Time for other tasks.
    4. Reduced stress on the H-bridge transistors.
    5. Allows use of single-precision floating-point math for better accuracy.

    Hardware Considerations:

    We'll use DD coils:
    • The transmit coil (25 turns, 22 SWG, 10" diameter) has approximately 223 μH inductance, 845 ohms impedance at 6 kHz, and requires a 315 nF capacitor for resonance.
    • The receive coil (40 turns, 28 SWG, 10" diameter) has approximately 678 μH inductance, 1357 ohms impedance at 6 kHz, and requires a 104 nF capacitor for resonance. This means the receive amplifier must match this impedance.

    A 1 cm steel coin 5" away, with 100 mW transmit power, is expected to generate a very weak signal (microvolts) in the receive coil. Since the STM32's ADC has a least count of about 0.8 mV (with a 3.3V full scale), we'll need an amplifier with a gain of around 1000.

    Additionally, we could increase the transmitting power, though this may increase the noise or increase false targets/wrong identification.

    To simplify coil tuning, we'll implement a frequency counter mode on the STM32 using a Colpitts oscillator. This will measure the resonant frequency of each coil. Ideally, the transmit frequency will be automatically adjusted to match the measured resonant frequency (within a few Hz of 6 kHz to avoid affecting filter and impedance calculations).
    ​

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  • Atul Asthana
    replied
    Originally posted by ArchibaldSTM View Post
    Many devices are built on a similar principle of signal processing. One of them is Stalker-IB. However, this is a commercial project. If yours is free, then I only support your desire to do this!
    This project embraces a fully open-source and free philosophy, mirroring the nature of the Blue Pill hardware and its associated software ecosystem. Leveraging existing open-source components minimizes development effort. The core objective is collaborative development, harnessing collective expertise and knowledge to create a metal detector accessible to all.
    ​

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  • JoyJo
    replied
    Originally posted by Carl-NC View Post
    All of the latest VLF/MF metal detector models from the leading companies are direct sampling designs. RX coil followed by a preamp, ADC, and DSP. Incredibly simple & cheap. Pretty much all these designs use a 24b ADC (usually an audio CODEC such as a PCM3060) ...
    The Minelab Equinox board also has an audio codec chip with a dual-channel ADC. The only thing is that the multiplexer chip is also placed on the board. I still haven't figured out what it's for. Of course, it somehow has to be involved in the multi-frequency mode, but in which part of the circuit: in TX or RХ?

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  • ArchibaldSTM
    replied
    Many devices are built on a similar principle of signal processing. One of them is Stalker-IB. However, this is a commercial project. If yours is free, then I only support your desire to do this!

    Leave a comment:


  • Atul Asthana
    replied
    yes, a 24-bit ADC offers superior performance, however the increased hardware interfacing and software development complexity is undesirable for a hobbyist-level project. Since commercial VLF detectors achieve approximately 80 dB of dynamic range, a 12-bit ADC, providing over 70 dB, is considered sufficient for this design's objectives.
    ​
    The goal is to create a simple yet effective VLF metal detector, maximizing the STM32 Blue Pill's capabilities to minimize hardware and software complexity. This approach avoids the need for external drivers, additional chips, multiple power supplies, and complex tuning procedures.

    Similarly, existing software libraries will be used to reduce the burden of writing and testing custom signal processing code.

    Essentially, it's an exercise in fully utilizing the Blue Pill for this application.
    The primary objective is a "good enough" metal detector built with simplicity in mind.
    ​

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  • Carl-NC
    replied
    All of the latest VLF/MF metal detector models from the leading companies are direct sampling designs. RX coil followed by a preamp, ADC, and DSP. Incredibly simple & cheap. Pretty much all these designs use a 24b ADC (usually an audio CODEC such as a PCM3060) so a 12-bit ADC may prove to be a little light for this task. With direct sampling & DSP, you can do things that are difficult and maybe impossible in analog circuitry. But don't get your hopes up on precision target phase; there is no such thing. Target phase is always roughly-approximate as it can vary with coil position, sweep speed, and ground mineralization. Trying to achieve precision here is pretty meaningless and 1-2° is about as good as it gets.

    If I ever get around to doing ITMD4, it will be with a greatly expanded focus on digital detectors and MF. So I encourage you to continue.

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  • Atul Asthana
    replied
    Originally posted by Detectorist#1 View Post
    Hi Atul Asthana,
    The general question is - what really new will be the results of this project comparing with so much known VLF serious projects in last 20 years. Using of uP spends 3-4-5-6 integral circuits and what will be the different in the end representations of this MD. Yes, the possibility of automatic adaptation to different coils (maybe will be implemented in this design) is convenient, but every type of coils (size and configuration) is optimal for a specific conditions. The idea - now we will use uP and after that we will think how to achieve a new different results is not new.
    My apologies sir, for not clearly bringing out the purported benefits of 'conjuring' this project / device / idea. Allow me to add some comments.

    This project aims to bridge the gap between simple hobbyist detectors and more advanced commercial detectors by leveraging the power of Digital Signal Processing on a cost-effective and open-source platform. It offers the potential for significantly improved performance and features compared to typical hobbyist designs while retaining the educational and modifiable nature of open-source projects.

    This microcontroller-based VLF metal detector project differentiates itself from existing open-source/hobbyist designs through its focus on improving performance, features and extendability by using full Digital Signal Processing (DSP). While most hobbyist detectors rely on analog circuitry or basic microcontroller functions, this project utilizes the STM32F103C8T6 (or may be other new microcontrollers) for complete signal analysis. This enables advanced digital filtering, precise phase/amplitude extraction via algorithms like Goertzel, and sophisticated VDI calculation for improved target identification.

    Unlike simpler designs with limited features, this project has the potential for advanced capabilities like automatic ground tracking, notch filtering, customisable audio tones, and data logging, all implemented in software for greater flexibility. Like other hobbyist projects, it intends to be open-source and modifiable, encouraging experimentation. This approach aims to bridge the gap between basic hobbyist detectors and more advanced commercial models by offering significantly enhanced performance and features within an accessible, open-source platform.

    ​This project also offers significant expansion potential. Integrating GPS data could enable location-tagged target mapping, even tracking shifting ambient conditions for subsurface archaeological surveys using GIS mapping. The open-source nature empowers diverse users to contribute their expertise, extending functionality through software modifications and integration with other tools, far beyond the initial design of this project.
    ​

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  • boilcoil
    replied
    Originally posted by Detectorist#1 View Post
    Hi Atul Asthana,
    The general question is - what really new .........
    ​

    The benefit is, that with direct sampling and digital signal processing can be made as many virtual channels as you want - something impossible for an analog detector.

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  • Detectorist#1
    replied
    Hi Atul Asthana,
    The general question is - what really new will be the results of this project comparing with so much known VLF serious projects in last 20 years. Using of uP spends 3-4-5-6 integral circuits and what will be the different in the end representations of this MD. Yes, the possibility of automatic adaptation to different coils (maybe will be implemented in this design) is convenient, but every type of coils (size and configuration) is optimal for a specific conditions. The idea - now we will use uP and after that we will think how to achieve a new different results is not new.

    Leave a comment:


  • ArchibaldSTM
    replied
    Oops! I posted the wrong picture))) I'm sorry

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