Originally posted by green
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Designing an Integrator circuit
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Any dc offset at the input will cause the output of an ideal integrator to increase until eventually it hits the power rail and gets stuck. In a practical integrator (like the one's we use in our PI detectors) there is a resistor placed across the feedback capacitor to prevent integration of the dc input. This works because the impedance of the capacitor is extremely high at dc, and the feedback resistor is dominant. The reverse is true at high frequencies.
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A test. Target, three layers 1x1inch aluminum foil swinging from a pendulum 10 inches above coil. Varied swing distance to see the effect speed had on signal strength. 200mm coil. Target is glued to center of a 200mm disk to cover photo cell(centered over coil about .4inches below disk) when the target is over the coil. Sweep speed, meters/sec=.2meters/cover time(sec). Target at edge, signal about half target centered.Attached Files
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Transfer Function: The Laplace transform of an integrator is given by 1/s.
A typical low-pass filter (e.g., an RC filter) has a transfer function of 1/(1 + sRC), where R is the resistance and C is the capacitance.
DC Behavior:
An ideal integrator has infinite gain at DC (s=0), meaning a constant input signal results in a linearly increasing output.
Integrators have infinite DC gain, while low-pass filters typically have a gain of 1 at DC.
Low-pass filters have a flat response at low frequencies, unlike integrators which have increasing gain at low frequencies.
IMHO you cant beat an ADC and digital precision ...
in code :
begin
if INTEGRATION_TIME < INTEGRATION_PERIOD then
SIGMA = SIGMA + ADC_SAMPLE
INTEGRATION_TIME = INTEGRATION_TIME + 1
else
SIGMA = ADC_SAMPLE
INTEGRATION_TIME = 0
end if
loop
There is a simpler way even ...
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