uPC Controlled PI

[Carl-NC]

Initial peak voltage is I*Rd, so you need a max I = 600/760 = 800mA.

[KingJL]

JL,

I done sims on the diode idea, and also added it to a test circuit. In both cases, there is practically no difference in performance.

- Carl

I can believe it! If my calculations are correct, I believe that the forward biased capacitance is roughly sqrt of Cjo (0 biased junction capacitance). That being the case, an extremely fast diode with a 25pf Cjo would have a forward biased capacitance of ~5 uF. That in series with my 45 pf of my FQPF2N60C would change the capacitance that is not measureable.

Like I said in the previous post, what I thought I saw was a manifestation of other changed parameters.

Carl, tell me if I am wrong: To attain the fastest discharge decay, I should adjust the PW t0 attain the highest current that does not create a flyback potential in excess of my MOSFET bv (in my case 600V). In my case, with a 300 uH coil and a 760 rd, that would limit me to ~1-1.1 amp.
Regards,
J. L. King

[Carl-NC]

JL,

I done sims on the diode idea, and also added it to a test circuit. In both cases, there is practically no difference in performance.

- Carl

[KingJL]

The last version (and previous versions) of the design document contained the following statements:
"A diode shall be in the drain circuit of the MOSFETs, to further protect the MOSFETs and to reduce the COSS capacitance of the MOSFET seen by the TX coil (diode capacitance 20pf in series with 25pf) . Some diode candidates are: UG2005 (Diodes Inc) 20pf, or 1N4004, 1N4005, 1N4006, 1N4007 (15pF)."

The next version of the document will not contain those statements. I believe that I had mis-interpereted the results of previos experiments, and need to re-test the hypothesis. I believe I have seen the same results simply by duplicating the resistance exhibited by the diode in the drain coil path. What I had interpereted as a reduction in flyback decay due to reduced overall capacitance may simply have been a reduction in flyback decay simply because of reduced flyback voltage due to lower coil current resulting in less time that the flyback voltage exceeds the MOSFET shunt diode voltage. I need to re-run the tests with the same coil current for each test and also keeping the flyback voltage below the MOSFET voltage. Only the can we determine that the reduction in flyback decay is due to diode capacitance (which I doubt since diode capcitance is only specified/measured for REVERSE bias conditions).
Regards,
J. L. King

[KS4NS]

ExpressPCB

Hi,

Looks like a great project. I am sure I will want to build it after I finish Gary's PI. Once you get the bugs out of the layout, I would be happy to transfer your PCB layout to an ExpressPCB miniboard format and post same for all to use. I have had good luck getting people to contribute to the cost in order to get a board or trade boards for parts. It's only about $56 for three boards and the quality is great. I am not a programmer or electronics design person, but I can make decent layouts. Keep in touch. Dale

[KingJL]

PS PIC

Picture of the board with PS installed.

Regards,
J. L. King

[KingJL]

PS complete

Finished installing components for the power supply (-5, +5, +3.3). Tesing revealed some needed changes. As a load was placed on the +5V, the voltage dropped off severely. A little trouble shooting shoed that the board layout for the PNP transistor was wrong hence it was installed backwards. Reversed the mounting of the PNP and everything much better. While I was at it I stress tested the +5V. At about 60 ma the 5V would drop slightly. Change some component values to insure that supply current would be more than adequate. Changed the resistor between the 555 output and drive transistor base input capacitors to a 68 ohm. Change the PNP to a BC327-25; changed the NPN to a 2N4401. Now we have an inverter capable of driving to 100ma!!

Changed the package definition for the PNP, and updated the schematic to reflect the changes. Updfated files are in the attached zip file.

Updated the design document to include the PS specifications. Updated document is also attached.

Regards,
J. L. King

[KingJL]

PS (+5V) Error

Changed the sequence of board population and test. Due to the arrangements of components and the ease of accessing them during assemply and test, I decided to implement and test the +5V inverter circuit first. Well, that brought to surface an error in the schematic. The 555 output being fed to the inverter transistors was being taken fron the wrong 555 pin (pin6 vs pin3). Made a ad-hoc modification to my test board and continued. 555 now outputing a square wave at 17.6 KHz to the inverter transistors. Positve 5V circuit now working.

Attached is a set of eagle files that reflect the positive 5V circuit correction.

Negative 5V is next. That SHOULD be fairly straight-forward. Will post board pictures when negative 5V completed.

Regards,
J. L. King

[KingJL]

Updated Files

I found that the best images with which to produce the laser prints were BMP files created at a resolution of 1200 dpi (same as the highest quality setting of my laser printer). I have included these files in the board.zip file.

I had to change the pads on the 5 pin 220 package and that changed the board and schematic files. The curent version of all eagle files are included in the TX-RX thru-hole V3.zip file.

[KingJL]

Cleaned board

Here is the cleaned board. Initial checkout of signal paths indicate everything OK. Next step is to populate the board. I will be doing this in stages and test everything before moving to the next stage. The first stage will be the -5V regulator circuit followed by the 555 driven inverter circuit and +5V regulator.

Regards,
J. L. King

[KingJL]

Boards etched

Etched the boards this afternoon. Everything appears to point to success. Leaning the boards next! Sorry for the fuzzy iages!

[KingJL]

Laser Print Transfer

Well, I finally got the laser transfer to a baord that I believe is ready for the etchant. The pictures aren't the best quality, but that is what I have. Tomorrow afternoon (actually I believe it will be this afternoon, as it is currently 1:20 AM) I will try to etch the board.

[KingJL]

Well, here is my first attempt at a board layout with the new schematic. I would appreciate a review of the board and comment before I make an attempt at a laser print transfer of the layout to copper. I have included the board layout files in both BMP and PDF formats.

Regards,
J. L. King

[KingJL]

Eagle Files Update

Needed to update the schematic of the TX/RX Frontend.

By removing the second ISO7220M and reconfiguring U304 (TPS2814), the input was below the input threshold at the new VCC (17V). Added a 2N3904 to convert the -12V to -7V (5V) ISO7220M output signal to a -12V to +5V signal.

Even with the older configuration where VCC of the TPS2814 was 12V (-12V to GND), the 5 Volt gate signal from the ISO7220M was marginal.

To answer those who question the use of the TPS2814 vs switching transistors: In pre-design simulations, I had noticed difficulty achieving accurate turn-on/turn-off times of the MOSFET's due in large part to their gate capacitance. This capacitance with the resistance of the switching transistor circuits produced a TC that would delay or hold (significantly) the gate charge on the MOSFETs. With the TPS2814 there is sufficient instantaneous current supplied to lessen the effective TC of the gate circuits and provide more accurate timing. That is the plan anyway. That is the purpose of the prototype...to verify and prove the design assumptions.

Regards,
J. L. King

[KingJL]

I was trying to think of a name that includes "King"... how about the KingFisher PI ? King Cobra is also good, but is a current Kellyco model.

KingFisher PI has sort of a ring to it, eh? Sounds good to me. Let's do it! Thanks Carl.
Regards,
J. L. King