Replies to Minipulse Plus

[Qiaozhi]

I have added the REV-C Build Document to the project details, for those who have ordered the latest PCB from Silverdog.
Please also note that the fix for the sync issue is included in the REV-C doc, but not in the REV-B version. So (if you're building a REV-B board) read that as well to understand where to fit the extra 100pF capacitor.

[joop]

Hi All,
I have just put together a summary of the test point measurements except for TP2 (5V rail) these have been taken without the fix to the TX oscillator synchronization..!

Thanks Dean, very useful!

[Davor]

Fair enough. Every contribution that consistently appears as offset is removed by EF pulse.
I'm glad sync works.

[Qiaozhi]

Thanks,
it means that transitions happen at approximately every 25us, and apart from being away from audio range it is still contributing noise.
I'll see about a cheap and cheerful variant using a pair of mosfets, and a pair of resistors. I'll let you know If I find a solution this way.

If you monitor the TX pulse and the LT1054 oscillator, you will notice that the first transition does not occur until 40us after turn-off. Also any synchronous signals will be removed by the sampling and integration process. So far this seems a simple and robust solution. Personally I'm not in favour of discrete diode pump circuits, as they introduce a lot more switching noise than a dedicated IC, are less reliable, and tend to drop out at a higher voltage.

[Davor]

Thanks,
it means that transitions happen at approximately every 25us, and apart from being away from audio range it is still contributing noise.
I'll see about a cheap and cheerful variant using a pair of mosfets, and a pair of resistors. I'll let you know If I find a solution this way.

[Qiaozhi]

... or better say, the noise happens at times away from timeslots when Rx takes samples, just like it was never there.
George, if you are at it, could you please check the frequency applied to the PSU charge capacitors? They might need beefing up if you use a bit more thirsty op amps in a design.

The LT1054 is still running at its normal internal clock of 20kHz, but the signal at U2 pin 2 goes high during the time the TX pulse is high (Q2 collector low). Effectively, the TX oscillator is giving the LT1054 a swift kick at regular intervals of about 1ms, with the result that it's not being directly clocked at the slower TX pulse rate, and we have a win-win situation.

[Dean Sarelius]

The puzzle of how to synchronize the TX oscillator with the LT1054 is now solved!

The solution is ridiculously simple. I had a brainwave and connected a 100pF capacitor between the collector of Q2 and U2 pin7.
Now it's synchronized. Yippee!

Before you do the modification, connect scope channel 1 to TP1, and channel 2 to U2 pin2. You will see the two signals are asynchronous.
Then fit the 100pF capacitor and you'll discover the two signals are locked together. Simple really.

I tested for any unexpected side effects, such as the +5V supply dropping out at a higher voltage, but could not see any difference. There was also no discernible difference in the detector's sensitivity, but at least everyone can stop mourning the demise of the sync pulse. I will update the latest (REV-C) Build Document tonight, and post the fix in both the REV-B and REV-C threads.

Hi All,
I have just put together a summary of the test point measurements except for TP2 (5V rail) these have been taken without the fix to the TX oscillator synchronization..!

[Davor]

... or better say, the noise happens at times away from timeslots when Rx takes samples, just like it was never there.
George, if you are at it, could you please check the frequency applied to the PSU charge capacitors? They might need beefing up if you use a bit more thirsty op amps in a design.

[Qiaozhi]

Hi Qiaozhi, can you explain what is purpose of mentioned synchronization?

The internal switching that occurs within the LT1054 can introduce noise into the receive chain. It effectively acts like an external source of EMI. With synchronization, the sampling integrators will remove this noise.

[WM6]

Hi Qiaozhi, can you explain what is purpose of mentioned synchronization?

[Qiaozhi]

The puzzle of how to synchronize the TX oscillator with the LT1054 is now solved!

The solution is ridiculously simple. I had a brainwave and connected a 100pF capacitor between the collector of Q2 and U2 pin7.
Now it's synchronized. Yippee!

Before you do the modification, connect scope channel 1 to TP1, and channel 2 to U2 pin2. You will see the two signals are asynchronous.
Then fit the 100pF capacitor and you'll discover the two signals are locked together. Simple really.

I tested for any unexpected side effects, such as the +5V supply dropping out at a higher voltage, but could not see any difference. There was also no discernible difference in the detector's sensitivity, but at least everyone can stop mourning the demise of the sync pulse. I will update the latest (REV-C) Build Document tonight, and post the fix in both the REV-B and REV-C threads.

[Jose]

Thanks Davor
On reflection, and when in doubt, I think I will use the J113, or any replacement. This way I'll have an easier PCB and fewer headaches.

[Davor]

What I try to do is GS4, with some improvements as it has in GS5, with the greatest simplicity.

I'm not sure what schematic you attached, but this kind of change is a complicated one, and benefits are marginal. You could do better if you replace TL074 in integrators with a faster low noise op amp with FET input.

Diodes and capacitors in the attached schematic form a sort of level shifter that can be used to control 4066, and only because in GS4 the 45038 are supplied with -12V.

[Davor]

This is why I prefer the LT1054, with an operating range up to 15V, and (when used as a voltage inverter) it doesn't drop out until 8.4V (1.05V per cell).
Also, the LT1054 provides much lower voltage losses than the ICL7660A.

After a long while, I realised that the whole function og LT or ICL in sync mode here is a dumb MOSFET complementary pair driver with some silly bells and whistles that are not used at all, and that I can get it all by simply replacing the IC with a pair of mosfets, say 2N7000/BS250. And get the whole thing running at 1/10 price of a chip that refuses to get synced. :duh:

I'll see what it takes in LTspice tomorrow.

[Jose]

Thanks to all
What I try to do is GS4, with some improvements as it has in GS5, with the greatest simplicity.
The idea is to try to use bilateral floodgates of 4066 instead of the J113.
In the scheme of the GS5 published, you can see they use the same time base GS4, but with the addition of 4 diodes and 4 capacitors, 1N4148 100 nf.
I hesitated, for I see in some schemes timebase fed (5 and -5 Volts) such as the Surf PI.
In GS4 and GS5, the time base, are fed (12; -12.. GS4 ) and (-10 and -10 ... GS5).
The floodgates of 4066, are fed into the PI, HH1 and HH2 surf with (5; -5).
Attached is a screenshot of part of the scheme, for better understanding and opinion on the matter.
Thank you.
Jose