New Bipolar Boost TX and Front End

[Mdtoday]

Thanks JL, I will spend more time checking things tonight. The reference point for the measurements was 0v. I suspect it may be a dud solder joint even though I checked a couple of times under the magnifier, or maybe it is an artifact as you say.

I might measure the capacitor values too just to be sure.

Checked over the whole circuit tonight, component values, solder joints, logic pulses from FPGA, all look ok.
Loaded mosfets and connected my 590uH 3 ohm test coil, still no change in pulse transformer secondary.
All 4 outputs have similar differentiation type waveform

Not sure what I have missed but will set up again tomorrow with a few more probe points soldered on for my logic analyser and DSO so I can get a better view of whats going on.
Probably something silly I've missed..maybe the toroid , just cant see what it is at the moment.

[Mdtoday]

We have a new baseline for the current direction of the project. That being using the Nextion 3.5" Enhanced TFT display for the user interface. To implement the Nextion interface involved significant effort in the HDL hardware definition and moderately massive rewrite of the embedded processor software, but we have a functional baseline to start working with.............................

[ATTACH=CONFIG]48444[/ATTACH]

Enjoy,
J. L. King

Excellent work JL, thanks for sharing, that is a big branch indeed!

[Mdtoday]

The Boost A_G would involve C29.

The waveform with C29 connected properly should look something like this:
[ATTACH=CONFIG]48447[/ATTACH]

The waveform with no or poor conection to C29 would look something like this:
[ATTACH=CONFIG]48446[/ATTACH]

Of course the scope screen shot you have could be an artifact caused by a complete isolation from ground of the secondary side of the pulse transformer with no MOSFETs or coil connected. To the probe both the Boost_A_G and the Boost_A_S are at the same potential (unless the ground lead of the probe is connected to Boost_A_S which I would not recommend for a live circuit) with the only ground reference through the probe capacitance during the transition times.

Thanks JL, I will spend more time checking things tonight. The reference point for the measurements was 0v. I suspect it may be a dud solder joint even though I checked a couple of times under the magnifier, or maybe it is an artifact as you say.

I might measure the capacitor values too just to be sure.

[KingJL]

I'll check the board again tonight, quite possible it is an non soldered cap pad, that particular screenshot was on TX-/ Boost A-G. I did not check any others.

The Boost A_G would involve C29.

The waveform with C29 connected properly should look something like this:


The waveform with no or poor conection to C29 would look something like this:


Of course the scope screen shot you have could be an artifact caused by a complete isolation from ground of the secondary side of the pulse transformer with no MOSFETs or coil connected. To the probe both the Boost_A_G and the Boost_A_S are at the same potential (unless the ground lead of the probe is connected to Boost_A_S which I would not recommend for a live circuit) with the only ground reference through the probe capacitance during the transition times.

[Carl-NC]

Mdtoday has a board almost completely populated. He has been testing different functionalities (power supply voltages etc.) as he progresses. I would expect that he will be testing the TX with pre-configured timing data in the near future. My board is only about 10% populated as I have been focusing on FPGA HDL and embedded processor software. The user interface using the Nextion tft display will be live in the next couple of weeks (as I lose a whole week for Thanksgiving). The FPGA HDL definitions and embedded processor software have been run on an actual Cmod-A7 FPGA and the output timing signals observed with a data analyzer. We are getting close to testing with everything tied together.

OK, good to know. I'm more keen on seeing what the circuit can do. It looked really interesting.

[KingJL]

New Hardware/Software baseline

We have a new baseline for the current direction of the project. That being using the Nextion 3.5" Enhanced TFT display for the user interface. To implement the Nextion interface involved significant effort in the HDL hardware definition and moderately massive rewrite of the embedded processor software, but we have a functional baseline to start working with.

The new hardware design:


On the hardware definition side:
Removed UserIF, PmodOLED, and Flash hardware modules and associated interrupts. Reconfigured the interrupt concat and interrupt controller hardware configurations to reflect the number of interrupts. Modified the TX-RX hardware module to supply "probe enable" signal. Added Uart16550 hardware ip to provide communications with Nextion user interface. The hardware configuration may need to be modified slightly to communicate with Nextion hardware. Namely the modem control signals DTR, RTS, CTS, DSR, DTR, DSD.

On the software side:
All code for the user interface that was based on the PmodOLED display and the Pmode encoder was removed. The sofware to initalize and control flash storage of parameters was removed. Since the flash initialization contained the code to set up systems interrupts, code for setting up system interrupts had to e developed. All code that dealt with the rotary encoder user interface was removed. Next code had to be developed to initalize the Uart16550 and connect it with thse system interrupts. The current Uart 16550 initialization sets up the controller to use interrupts, baud rate 19200, and 16 charactwer FIFO's enabled. The initialization code performs a loop-back test to verify the operation of the Uart 16550.

When the Nextion hardware is available, tests will be made communicationg with the hardware. When communications can be verified, the baud rate will be increased to the maximum sustainable with both systems. I believe that rate to be 921600 bps. At that time the code will be deveoped to retrieve stored parameters from the Nextion to set/control the TX-RX timing parameters and to send target data to the Nextion for presentation to the user.

In the current status of the project the TX-RX operates with timing parameters that are set as default in the hardware definition. The RX data, and RX filters are operating, supplying an interrupt when data is available. The current state of the project will drive/exercise all TX/RX functions with the default timings. Debug prints (which can be turned off or on in the "Bipolar_PI.h" header file) show the values of the RX signal and the filters.


The current Vivado project archive is Vivado_Biploar_PI_Nextion(11-20-2019).zip
If you have been downloading these inro a project directory, I suggest that you rename your current directory and create a new project directory.

The current Nextion arhive is:
Nextion_Bipolar_PI(11-20-2019).zip

Changelog:
Change Log.txt

Enjoy,
J. L. King

[Mdtoday]

We may have a problem here.... That is what the waveform would look like if the capacitor in the secondary of the drive circuit was missing or had a bad connection. I don't know which drive circuit you were measuring, but I am talking about C29, 32, 35, or 36 (3n3).


I have an eye doctor appt. this AM, but will do some more checking when I get back this afternoon.

I'll check the board again tonight, quite possible it is an non soldered cap pad, that particular screenshot was on TX-/ Boost A-G. I did not check any others.

[KingJL]

... Checked gate drives
[ATTACH]48437[/ATTACH]
[ATTACH]48439[/ATTACH]...

We may have a problem here.... That is what the waveform would look like if the capacitor in the secondary of the drive circuit was missing or had a bad connection. I don't know which drive circuit you were measuring, but I am talking about C29, 32, 35, or 36 (3n3).


I have an eye doctor appt. this AM, but will do some more checking when I get back this afternoon.

[Mdtoday]

It's still 44 deg C here today so I'm taking a break to go for a swim, then hopefully, later tonight I can post results of the testing.

Only time for some quick tests tonight but...

Tested with KingJL's last Software/firmware build (Vivado_BiPolar_PI_11_8_2019), no mosfets or coil installed/connected yet.



Checked gate drives




A quick check on the preamp output briefly touching finger onto RX pins.....its doing what it should...more in depth probing to come after I install Mosfets and connect coil.


Too late tonight , will continue tomorrow but its looking good.

The only thing of note is the LM317 inrush current limiting circuit. I had to account for the voltage drop across the device and adjust the 5v reg output to 6.3v to get 4.5v on the output of the current limiter.
I had almost forgotten about that one.

[Mdtoday]

Correct, I have loaded all but the 4 pulse transformers and the Mosfets and then onto the TX testing, this will happen over the next few nights

I had time today to load the pulse transformers and do a sanity check on the supplies, all looks good.







I used 2.5 x 7mm nylon spacers and snap rivets to assemble both boards as they will be coming on and off during the next testing stage and this is a quick way of doing it.
Next to fit the CMOD A7 . encoder, display and check voltages again.
Then I will load the mosfets and do some more testing on that stage.

It's still 44 deg C here today so I'm taking a break to go for a swim, then hopefully, later tonight I can post results of the testing.

[Mdtoday]

Finally... solved it... now the Uart16550, and all other interrupts are working. Now on to configuring the Uart16550!

Great news

[Mdtoday]

Mdtoday has a board almost completely populated. He has been testing different functionalities (power supply voltages etc.) as he progresses. I would expect that he will be testing the TX with pre-configured timing data in the near future. My board is only about 10% populated as I have been focusing on FPGA HDL and embedded processor software. The user interface using the Nextion tft display will be live in the next couple of weeks (as I lose a whole week for Thanksgiving). The FPGA HDL definitions and embedded processor software have been run on an actual Cmod-A7 FPGA and the output timing signals observed with a data analyzer. We are getting close to testing with everything tied together.

Correct, I have loaded all but the 4 pulse transformers and the Mosfets and then onto the TX testing, this will happen over the next few nights

[KingJL]

I've been loosely following this thread and I'm sure I've missed some things, but has the detector circuit been built & tested?

Mdtoday has a board almost completely populated. He has been testing different functionalities (power supply voltages etc.) as he progresses. I would expect that he will be testing the TX with pre-configured timing data in the near future. My board is only about 10% populated as I have been focusing on FPGA HDL and embedded processor software. The user interface using the Nextion tft display will be live in the next couple of weeks (as I lose a whole week for Thanksgiving). The FPGA HDL definitions and embedded processor software have been run on an actual Cmod-A7 FPGA and the output timing signals observed with a data analyzer. We are getting close to testing with everything tied together.

[Carl-NC]

I've been loosely following this thread and I'm sure I've missed some things, but has the detector circuit been built & tested?

[KingJL]

I have successfully connected all of the other interrupts so it is something amiss in the parameters that I am providing for the Uart xintc_connect.

Finally... solved it... now the Uart16550, and all other interrupts are working. Now on to configuring the Uart16550!