Android Phone Based Metal Detector - FCMD

[Aziz]

Hi Paul,

thanks for clarifications. It caused a glitch in my matrix. My bad.

I like the KISS H750 version. Let's think further and improve it to handle GB, ability to detect tiny gold on severe ground conditions and get the relation of Resistive R / Reactive X response for simplified discrimination.

The triangular coil current can be considered to be wide band TX. You can decode the high frequency response parts too. A simplified and effective ground balance can be done using only the magnitudes of the frequency responses. Or take a rectangular pulse driving transmitter. Or anything else. Any wide band transmitter works the same.

Known parameters and naming conventions: simplified for two frequencies in this example (IB-configuration):
Slo stands for current decoded signal, low frequency part
Shi stands for current decoded signal, high frequency part (any high frequency part)
ref refers to a reference signal
X() refers to pure reactive response
R() refers to pure resistive response (we are interested in R() to make detection without ground response X() )

Let's begin:

Slo = signal magnitude of low frequency response (for instance 32 kHz)
Shi = signal magnitude of higher frequency (let's take the next harmonics, 64 kHz)

Sloref = reference of low frequency response (32 kHz), taken by ground balance procedure or auto tracking mode GB
Shiref = reference of high frequency response

For simplification we look at the absolute value changes: d stands for delta, a change of signals, so dSlo and dShi is always >= 0
dSlo = fabs(Slo - Sloref), absolute value change of Slo
dShi = fabs(Shi - Shiref), absolute value change of Shi

The signal changes follows X and R responses during normal operation. dSlo and dShi is affected by pure reactive X and resistive R responses. Grounds affect the X and targets R. Iron target both:
dSlo = X(dSlo) + R(dSlo)
dShi = X(dShi) + R(dShi), where
X() is the pure reactive X ground response and
R() is the pure resistive target response

Ground effects will cause pure reactive response X (no resistive targets present). It is a linear equation behaviour.
k1*X(dSlo) = k2*X(dShi)
It means k1 amount of dSlo caused by pure X ground response will cause k2 times of dShi pure X ground response.

Forming the linear equation:
X(dShi) = k1/k2 * X(dSlo), pure X response for high frequency
c=k1/k2 is the linear combination factor. If we adapt c, we can make left and right side of the equation equal and do ground balance.

This is the ground balance equation:
X(dSlo) - k2*X(dShi)/k1 = 0, (no ground signal)

You can remove the X part of your high frequency response and get the resistive response R():
dShi = X(dShi) + R(dShi), this is what we have, X() and R() response for the high frequeny reponse, we don't know how much X() and R()
R(dShi) = dShi - X(dShi), if we subtrace X(), we should get R()
R(dShi) = dShi - k1/k2 * X(dSlo), putting X(dShi) into the equation

We know the parameters dShi, k1 and k2 can be obtained by GB procedure or workbench testing with pure reactive responses
But we don't know the value of X(dSlo) to solve the equation.

We don't know during the normal operation, how much dSlo contains R(dSlo) and X(dSlo).
Remember:
dSlo = R(dSlo) + X(dSlo)

We are taking an assumption and setting R(dSlo) = 0 and assuming there is only ground response X() present.
R(dSlo) = 0,
dSlo becomes
dSlo = 0 + X(dSlo)
X(dSlo) = dSlo
This is a good compromise in the first instance.

Now we can calculate R(dShi):
R(dShi) = dShi - k1/k2 * X(dSlo), where X(dSlo)=dSlo
R(dShi) = dShi - k1/k2 * dSlo

We can also calculate the X()-part:
X(dShi) = dShi - R(dShi)
We get a good information about the ground or target conditions if we look at the relation R()/X(). We can track ground conditions by observing X() or the relation to track target conditions.
We can signal the output speaker with modulated combinations of X() and R() or R()/X() or put only the R()

This simple assumption lead to subtractive GB algorithm. Subtractive GB algorithms will lose some target response however. But the ground response will be higher on low frequencies. Target responses will be high on higher frequencies. So finding the biggest relation of X()/R() in the frequency domain. And we lose not much target response. This is the case for dSlo in my example.

We can apply the procedure to all higher frequencies each individual. Or group (integrate) the higher frequencies into one high frequency response.
dShi = fabs(Shi_1 - Shiref_1) + .. + fabs(Shi_n - Shiref_n), 1..n, high frequency responses, where
dSlo remains the same

This can be evaluated by post #22 published here:
https://www.geotech1.com/forums/foru...352#post444352

I am also refering to the post #82, #83 in this thread.
https://www.geotech1.com/forums/foru...903#post443903

Remember, I have used an unsigned change using the fabs()-function for the changes. This simplifies the calculations. You can use the signed changes as well.
And remember, I have used only the demodulated magnitudes (amplitudes). No phase info is processed. If you can do it, it will probably help in improving GB and discrimination.

I have finally put the example calculations in the post #22 for a X and R separation of iron target.
It works with any targets. Just imagine: a gold nugget in iron oxide ground behaves like an iron target on mild ground.

There is a big big nice feature for IB-configurations:
Any mechanic shock or temperature drift to the TX/RX coil arrangement will change (mismatch, disturb) the induction balance. This will lead in pure reactive X response seen by the RX-coil. This GB-method removes these unwanted effects automatically. You can work with less stable IB coils!

Big disadvantage:
This simplified GB-method can not eliminate Viscous Remanent Magnetism (VRM) effects and conductive salty grounds causing resistive response R().
You have to make either a manual adjustment to subtract some amount of resistive signal out of the calculated R() or do some kind of auto tracking during ground balance procedure so R() gets 0 (R() = 0 ) to eliminate such effects. But the ground conditions can change over time and you usually don't know when.
I think, nobody can handle these effects at the moment really.

Now the very important info:
This subtractive GB principle works on:
- IB Multi-frequency domain (shown here)
- Pulse induction on the sampled voltages over time v(t1), .., v(tn) on the decay curve, t1 early time, t2 later, and so on
- Pulse induction on the sampled integrated voltages (windows) w(dt1), .., w(dtn) on the decay curve, dt1 being early time integration with dt1 integration time, and so on

It isn't a rocket science. It has been described and published over the past decades. It is a simple linear combination subtractive GB method.
I hope, I didn't make any mistakes in the formulas.
I remember now, what I have done.
This is it. Bang, bang, bang! It's Oreshnik time!

Cheers,
Aziz

[ivconic]

I did get a version working with the sound card where I use the left and right input RX channels with L = coil and R = reference from TX. However this worked upto around 30 khz before phase slipping started occurring ...

That's better than my card, which does everything the same up to 13-14kHz.
The specification of the chip on the card is done under ideal conditions.
When you put the chip on the card and connect it to USB and to a standard PC (phone/tablet is worse); deduct at least 50% of the specifications.

[ivconic]

... the channel with the best discrim has the poorest ground rejection...

Ok, there's the answer to the problem.
Use that channel and find a way to additionally (laterally, without mixing) have GEB data.
Present them separately on GUI/Audio...

[moodz]

Hi Paul,

oh ok, I realise, that you are demodulating the I/Q channels with a bipolar unity gain rectangular reference waveforms (+1/-1, one reference channel is 90 degree phase shifted) of the demod frequency. This is very clever and very efficient on microcontrollers as you don't need any multiplications and divisions at all. Only fast integer add, sub, accumulate operations.


Nevertheless, I could do this on my sound card up to 192 kHz/4 = 48 kHz demodulation frequency in the same manner too. But must also demodulate a reference signal from the TX to get the correct phase lag between TX and RX signal. ENOB (due to noise) and limitted SR (max 192 kHz) limits the signal quality however.
You are definitely a winner with your $5 Chip. No doubt.

Cheers,
Aziz

I did get a version working with the sound card where I use the left and right input RX channels with L = coil and R = reference from TX. However this worked upto around 30 khz before phase slipping started occurring .. so either USB was dropping samples or bufferring jitter .. dont know ... I gave up. The AI didnt though it came up with very elaborate DSP to digitally correct the errors by dynamically altering the TX on the fly to compensate. I viewed this as creating a new source of problems to fix another source of problems. So went for the KISS H750

[moodz]

That detection range sounds very good!
For the real world use; will this design have trouble with wet/beach soil or near power lines, and will it actually be able to tell apart a common iron nail from, say, a silver coin?

it will probably have many more problems than you mention as well. It has not left the bench yet. This version is based on the FPGA design which does use a high end 24 bit ADC but costs alot more and is more troublesome to code for.
There is just a cap connecting the rx coil ( no RX preamp ). The tx is a bipolar 32 khz current square wave with 3us rise time +/- 90 volt flybacks across a 300uh 0.5 ohm coil. The coil current should be about +/- 400 ma. It can tell ferrous from non ferrous but that is a work in progress as I have a number of "channels" to choose from and of course the channel with the best discrim has the poorest ground rejection.

[moodz]

The AI never says the H750 ADC is better than a 24 bit ADC .... however for the purposes of this design a tiny $5 chip with $10 of components can make a sensitive detector and achieve good results all other things considered and the whole detector will fit in a matchbox.
For instance there is no point using an uber ADC sound card chip with -137db performance if the noise floor at the coil is -90db.
The AI does say that the H750 can achieve around 20 bit performance which is adequate for the application.
Read the summary extract again :
---
Comparison Summary

| Configuration | Base ENOB | Samples/Int | Eff. ENOB | Dyn. Range |
|-----------------------|-----------|-------------|-----------|------------|
| STM32H750 dual 16-bit | 11 | 80,000 | ~20 bits | ~120 dB |
| 24-bit mid-range | 17 | 3,000 | ~23 bits | ~137 dB |
| 24-bit high-end | 20 | 25,600 | ~27 bits | ~164 dB |

---
Key Insights

1. The STM32H750 approach recovers ~9 bits through massive oversampling (3.2 MHz vs 32 kHz) and synchronous integration
2. Diminishing returns on raw ADC bits: Going from 11→17 ENOB (6 bits more) only yields ~3 bits advantage after integration, because the faster ADC integrates more samples
3. Sample rate matters as much as resolution: The STM32H750's 3.2 MHz rate allows 80,000 samples vs 3,000 for a slower 24-bit ADC
4. Cost/complexity tradeoff:
- STM32H750: ~$5, integrated, simple
- 24-bit high-end: ~$20-50, external, complex analog design
5. Practical limit: At ~20+ effective bits, other factors dominate (thermal noise, component stability, interference)

Bottom line: The dual 16-bit @ 3.2 MHz approach achieves ~20 effective bits, competitive with mid-range 24-bit ADCs, at lower cost and complexity.

Cant get much simpler than the minimal detector circuit below ( useful as a pinpointer ). I proved this works because my circuit still detects metal at the coil with the transmitter boost turned off due to leakage currents from the driver cct.

[Aziz]

Hi Paul,

I think your AI hallucinates.

If I compare the STM32H750 with typical 11 bit ADC ENOB @ 3.2 MHz SR with a high end sound card with typical 20 bit ADC ENOB @192 kHz SR I get the following figures:

Times N more samples due to higher SR of STM32H750:
N = 3.2 MHz / 192 kHz = 16.7

Extra bits resolution for N=16.7:
Extra bits = ½ × log₂(N) = 2.03 bits
So the typical ENOB of STM32H750 increases to 11 + 2 = 13 bits
On the other hand, the sound card has still 20 bits ENOB.
Without taking any integrations into account.

Am I doing something wrong?
Aziz

[ivconic]

Finished V1.0 of the code for the STM32H750 chip ... I use this board: Its a chinese board by weact studio.
I will do a bit of testing then release the firmware. It detects a 10 x 10 cm foil at nearly a meter...

That detection range sounds very good!
For the real world use; will this design have trouble with wet/beach soil or near power lines, and will it actually be able to tell apart a common iron nail from, say, a silver coin?

[Aziz]

Hi Paul,

oh ok, I realise, that you are demodulating the I/Q channels with a bipolar unity gain rectangular reference waveforms (+1/-1, one reference channel is 90 degree phase shifted) of the demod frequency. This is very clever and very efficient on microcontrollers as you don't need any multiplications and divisions at all. Only fast integer add, sub, accumulate operations.


Nevertheless, I could do this on my sound card up to 192 kHz/4 = 48 kHz demodulation frequency in the same manner too. But must also demodulate a reference signal from the TX to get the correct phase lag between TX and RX signal. ENOB (due to noise) and limitted SR (max 192 kHz) limits the signal quality however.
You are definitely a winner with your $5 Chip. No doubt.

Cheers,
Aziz

[moodz]

Hi Paul,

"- Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each"
are you dividing the cycle into 4 parts (quadrants) and integrates the samples?
I+: integration of 25 samples
Q+: integration of 25 samples
I-: integration of 25 samples
Q-: integration of 25 samples
Do I understand it correct?

Basically yes however the timing is important to remain sample aligned over every cycle. This is something that cannot be done in a soundcard as the sampling phases are not locked to the operating phase / transmit phase and this means the soundcard is a dead end for this type of detection method. When I was using the soundcard we came to realize the real time audio varies slightly because the transmit and receive codec clocks were not quite the same ...this is due to slight different click buffers at either end of a USB link.The AI devised a phase tracking loop to compensate but it only worked up to about 20 khz on a soundcard. The method I am using here will work up to the Nyquist sampling rate or about 1.6 Mhz or 3.2 MHz if I reconfigure the ADCs this well above the requirements for metal detectors of course. The analysis and the actual results show that a $5 Chip outperforms a $200 sound card in this application but you have to take into account that a sound card was not designed for this application.

[Aziz]

Hi Paul,

"- Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each"
are you dividing the cycle into 4 parts (quadrants) and integrates the samples?
I+: integration of 25 samples
Q+: integration of 25 samples
I-: integration of 25 samples
Q-: integration of 25 samples
Do I understand it correct?

[moodz]

ANALYSIS :

System Parameters

- ADC resolution: 16-bit (each ADC)
- Sample rate: 3.2 MHz
- TX frequency: 32 kHz
- Samples per TX cycle: 3.2 MHz ÷ 32 kHz = 100 samples
- Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each
- Base packet rate: 50 Hz
- Default reset divider: 5 → 10 Hz integration rate

Processing Gain Calculation

1. Samples per Integration Period

At 10 Hz reset rate:
- TX cycles per integration: 32,000 ÷ 10 = 3,200 cycles
- Samples per quadrant: 25 × 3,200 = 80,000 samples
- Total samples per I or Q channel: 160,000 (I+ and I- combined)

2. Coherent Integration Gain

For coherent (synchronous) integration:
- Signal adds linearly: N×
- Noise adds as RMS: √N×
- SNR improvement = √N

For N = 80,000 samples per half-cycle:
√80,000 ≈ 283× voltage gain
20 × log₁₀(283) ≈ 49 dB

3. Effective Bits Gained

Additional bits from oversampling/integration:
Extra bits = ½ × log₂(N) = ½ × log₂(80,000) ≈ 8.3 bits

4. Dual ADC Benefit

Two uncorrelated ADCs sampling same signal:
- SNR improvement: √2 ≈ 1.4× (3 dB)
- Additional resolution: ~0.5 bits

Total Effective Resolution

| Component | Bits |
|----------------------|----------|
| Base ADC resolution | 16 |
| Integration gain | +8.3 |
| Dual ADC | +0.5 |
| Effective resolution | ~25 bits |

Summary

Processing Gain ≈ 49-52 dB (at 10 Hz bandwidth)
Effective Resolution ≈ 24-25 bits equivalent
Noise Bandwidth ≈ 5 Hz (at 10 Hz reset rate)

16-bit vs 24-bit ADC Analysis with ENOB

Typical ENOB Values

| ADC Type | Stated Bits | Typical ENOB | Notes |
|---------------------|-------------|--------------|--------------------------|
| STM32H750 @ 3.2 MHz | 16 | ~10-11 | High speed degrades ENOB |
| STM32H750 @ 1 MHz | 16 | ~12-13 | Better at lower speeds |
| Typical 24-bit SAR | 24 | ~16-18 | e.g., ADS1256 |
| High-end 24-bit Σ-Δ | 24 | ~20-21 | e.g., AD7768, ADS1262 |

---
Case 1: STM32H750 Dual 16-bit ADC @ 3.2 MHz

Assumptions:
- ENOB ≈ 11 bits (realistic for 3.2 MHz)
- Dual ADCs, 80,000 samples per integration

| Component | Bits | Calculation |
|------------------|------------|------------------|
| Base ENOB | 11 | ADC datasheet |
| Integration gain | +8.3 | ½ × log₂(80,000) |
| Dual ADC | +0.5 | ½ × log₂(2) |
| Effective ENOB | ~19.8 bits | |

Dynamic range: 19.8 × 6.02 ≈ 119 dB

---
Case 2: Single 24-bit ADC (Mid-range, ~17 ENOB)

Assumptions:
- ENOB ≈ 17 bits (typical ADS1256-class)
- Sample rate: 30 kSPS (typical for these ADCs)
- Single ADC, ~3,000 samples per 10 Hz integration

| Component | Bits | Calculation |
|------------------|------------|-----------------|
| Base ENOB | 17 | ADC datasheet |
| Integration gain | +5.8 | ½ × log₂(3,000) |
| Single ADC | 0 | No dual benefit |
| Effective ENOB | ~22.8 bits | |

Dynamic range: 22.8 × 6.02 ≈ 137 dB

---
Case 3: High-end 24-bit Σ-Δ ADC (~20 ENOB)

Assumptions:
- ENOB ≈ 20 bits (AD7768-class)
- Sample rate: 256 kSPS
- 25,600 samples per 10 Hz integration

| Component | Bits | Calculation |
|------------------|------------|------------------|
| Base ENOB | 20 | ADC datasheet |
| Integration gain | +7.3 | ½ × log₂(25,600) |
| Single ADC | 0 | No dual benefit |
| Effective ENOB | ~27.3 bits | |

Dynamic range: 27.3 × 6.02 ≈ 164 dB

---
Comparison Summary

| Configuration | Base ENOB | Samples/Int | Eff. ENOB | Dyn. Range |
|-----------------------|-----------|-------------|-----------|------------|
| STM32H750 dual 16-bit | 11 | 80,000 | ~20 bits | ~120 dB |
| 24-bit mid-range | 17 | 3,000 | ~23 bits | ~137 dB |
| 24-bit high-end | 20 | 25,600 | ~27 bits | ~164 dB |

---
Key Insights

1. The STM32H750 approach recovers ~9 bits through massive oversampling (3.2 MHz vs 32 kHz) and synchronous integration
2. Diminishing returns on raw ADC bits: Going from 11→17 ENOB (6 bits more) only yields ~3 bits advantage after integration, because the faster ADC integrates more samples
3. Sample rate matters as much as resolution: The STM32H750's 3.2 MHz rate allows 80,000 samples vs 3,000 for a slower 24-bit ADC
4. Cost/complexity tradeoff:
- STM32H750: ~$5, integrated, simple
- 24-bit high-end: ~$20-50, external, complex analog design
5. Practical limit: At ~20+ effective bits, other factors dominate (thermal noise, component stability, interference)

Bottom line: The dual 16-bit @ 3.2 MHz approach achieves ~20 effective bits, competitive with mid-range 24-bit ADCs, at lower cost and complexity.

[moodz]

Finished V1.0 of the code for the STM32H750 chip ... I use this board: Its a chinese board by weact studio.
I will do a bit of testing then release the firmware. It detects a 10 x 10 cm foil at nearly a meter.
There are no physical controls its all done over USB plugged into a phone/computer ... RTFM below.
note : It does not need the USB connection to run in default mode.


Here is the user manual :
USER_MANUAL.pdf




and the plotter app in python for experimentation :

[Aziz]

Hi Paul,

nice, very nice. I am looking forward to see your solution. You must be Santa Claus - do you?
I have started a new thread for my own experiments and measurements.. With different approaches.
Aziz

[moodz]

Aziz dunno about doing it with one mosfet ... I need to sweep the TX frequency from around 10 khz to 100 khz and keep the phase flat. Plus the circuit needs to drive an unbalance coil .. and did I mention that inductance changes must not change the phase relationships.
It took a bit of work but over the holiday break but I managed to get the driver into shape using a handful of cheap discrete parts not only producing the correct phase and amplitude across 10 - 100 khz but also bipolar into a transmit coil grounded at one end. Bonus .. it doubles as a bipolar PI transmitter as well.
The supply voltage is 3 volts and the Tx current is +/- 450 ma. ... around 1.5 watts of power consumption.
Traces for 10 khz and 100 khz below. With gold prices at over 6000 AUD even a .01 gram spec is worth $2.
The software phase sweep function is stable to 100 khz ...and now the coil driver can reach that frequency ... so if you think that .01 gram specs are not worth it ...think again. Would you walk past a ten dollar note ? ( .05 gram )
The coil voltages and currents are below ... 100 Khz and 10 khz shown.