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Android Phone Based Metal Detector - FCMD

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  • #76
    That sounds like a bit of a challenge. Are you using the STM32H7 on-chip DAC to generate the signal with an amplifier feeding the coil?

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    • #77
      Originally posted by Repwoc View Post
      That sounds like a bit of a challenge. Are you using the STM32H7 on-chip DAC to generate the signal with an amplifier feeding the coil?
      I use the onboard DAC driven by an NCO with .47 millihertz resolution.
      The software can generate sine or square wave.
      A 300uh coil has about 9 ohms of reactance at 5 khz and 188 ohms at 100 khz ...
      Ideally we want at least a flat spectrum across 5 Khz to 100 khz a simple amplifier will give a spectral rolloff due to the increasing reactance of the coil with frequency.
      However we can achieve a flat response by using an LR charging and energy recovery scheme in the driver so that the power spectrum will be flat across the desired frequency range.
      So if our top frequency is 100 khz ( 10 microseconds ) then the minimum required rise time of the coil is 5 microseconds ( 5 t ).

      Below are the plots of coil current at 100 khz and 5 Khz. If we sweep the frequency from 5 Khz to 100 khz the spectral energy is flat +/- 1 db.

      What about the capacitance ? Yes it does affect the result but not in the way most people think ( resonances etc ) ... the capacitance effect is a function of the source resistance of the feeding power supply and the capacitance value.
      A simple RC calculation where the time constant must also be be less than the time constant for the LR.

      Click image for larger version

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      100 khz below

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      5 khz below.

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      ​​​

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      • #78
        So DDS to generate the waveform. Presumably you could generate any (repeating) waveform, not just sine or square waves, using suitable lookup tables?

        Can you share the circuit for the constant current output vs frequency?

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        • #79
          Hi Paul,

          that's really an interesting project. I have enjoyed reading a bit (but not thoroughly).
          I am looking forward to read more.
          Cheers,
          Aziz

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          • #80
            Originally posted by Repwoc View Post
            So DDS to generate the waveform. Presumably you could generate any (repeating) waveform, not just sine or square waves, using suitable lookup tables?

            Can you share the circuit for the constant current output vs frequency?
            yep .. you can use any waveform you like from repeating lookup tables or you can calculate on the fly. The lookup table with DMA loading the DAC uses almost no CPU cycles.

            The driver is based on the work I did here : https://www.geotech1.com/forums/foru...ansmit-circuit

            Very easy to generate constant power spectrums upto frequencies way beyond 100 Khz that I will be using.
            This method does introduce harmonics but the widest filter in the DSP is code is 100hz wide downto a few hertz so no problem ... plus all the harmonics are frequency / phase locked to the fundamental anyway.

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            • #81
              Originally posted by Aziz View Post
              Hi Paul,

              that's really an interesting project. I have enjoyed reading a bit (but not thoroughly).
              I am looking forward to read more.
              Cheers,
              Aziz
              Welcome back again Aziz ! Hey I connected a USB sound dongle to the phone USB port and android recognises it and you can write code ( using AI ) to do DSP in less than 10 minutes. You can even use the codec inside the phone ( no dongle ). Then I realised that instead of doing all the DSP in the phone .. I could do the same in a STM32 with onboard 16 bit ADC and just use the phone to display whats going on in the chip but also the chip will run fine if you disconnect the phone. That means that we can build a detector using the chip and few components that will fit inside a matchbox or a dongle ( plus the coils of course ). At the moment the chip does a fast syncronous sweep over any frequency range from 100 hz to 100khz at 2 to 50 discrete points then does a statistical best fit to calculate the phase slope ( degrees / khz ) and this gives us the relative phase shift caused by ground and targets at all frequencies. The ground slope ( obtained in a ground calibration sample ) is subtracted leaving a target slope that will indicate a VDI and tone to give us the target ID.
              The AI is the answer to the maidens prayer .... it compressed months of coding into days .. if it could build hardware I would have this done by now.

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              • #82
                Originally posted by moodz View Post

                Welcome back again Aziz ! Hey I connected a USB sound dongle to the phone USB port and android recognises it and you can write code ( using AI ) to do DSP in less than 10 minutes. You can even use the codec inside the phone ( no dongle ). Then I realised that instead of doing all the DSP in the phone .. I could do the same in a STM32 with onboard 16 bit ADC and just use the phone to display whats going on in the chip but also the chip will run fine if you disconnect the phone. That means that we can build a detector using the chip and few components that will fit inside a matchbox or a dongle ( plus the coils of course ). At the moment the chip does a fast syncronous sweep over any frequency range from 100 hz to 100khz at 2 to 50 discrete points then does a statistical best fit to calculate the phase slope ( degrees / khz ) and this gives us the relative phase shift caused by ground and targets at all frequencies. The ground slope ( obtained in a ground calibration sample ) is subtracted leaving a target slope that will indicate a VDI and tone to give us the target ID.
                The AI is the answer to the maidens prayer .... it compressed months of coding into days .. if it could build hardware I would have this done by now.
                That's fine. I prefer hand coded stuff.

                I would like to peer review of the GB stuff shown here (but on my platform). We should get the same results I think.

                BTW, the multi-frequency GB does even work with amplitudes only (A = sqrt(I²+Q²) ) . You have to look at the absolute value of amplitude changes (change = fabs(current meauserement - reference)) . So leaving the phase angles completely. This is practical, if you don't have any TX reference signal to correct the phase angles in the demods. But it s a lossy GB method. Just like PI GB, where portions of target signals can be subtracted out. I have to show the GB response change spectrum and the linear combination factors sometime.

                So this is my motivation for a better GB scheme to minimize the target signal losses in heavy mineralized grounds.
                Aziz

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                • #83
                  Hi all,

                  I have looked at my old frequency response measurements in Excel table. Pity pity, It's a shame I didn't take more measurements with more infos. The measurements I have made are not convenient to show you. I can't remember, what I have done at that time. The great GB method could be lost forever. The only fact I know is, that it is based on linear combination factors with lot's of equations and variables and you even can't solve it. This is the reason for the lossy GB method.

                  I have to make the measurements once again sometime. With more infos and different target types and ground conditions.
                  Guess what! I need a new improved test board or have to search for the right one out of the dozens I have made so far. Where are they? I don't know.
                  Yep, Alzheimer.

                  Anyway, a good chance to improve everything. A new GB method too. At least I can peer review Pauls work.
                  Cheers,
                  Aziz

                  Comment


                  • #84
                    Hi Paul,

                    Originally posted by moodz View Post
                    The driver is based on the work I did here : https://www.geotech1.com/forums/foru...ansmit-circuit
                    OMG, this is a nice transmitter.

                    But I tend to use a very very simple TX-circuit having
                    - one mosfet only (n-ch, high voltage)
                    - simple switch timing
                    - power efficient (with energy recovering)
                    - overall simple and kiss design
                    - still wide band spectrum response on the RX side
                    - bipolar coil current (polarity change of coil current)
                    - the ability to push enough power into the TX coil regardless of TX coils reactance (max +1/-1 A is enough for beginning)

                    Oh well, this is my wishing list for the X-mas. I'm confident, that Holly Santa Claus has the gift for me in his bag.
                    I think, we already have such a TX-circuit somewhere here.

                    Cherrs and Marry X-mas to everybody.
                    Aziz

                    Comment


                    • #85
                      Aziz dunno about doing it with one mosfet ... I need to sweep the TX frequency from around 10 khz to 100 khz and keep the phase flat. Plus the circuit needs to drive an unbalance coil .. and did I mention that inductance changes must not change the phase relationships.
                      It took a bit of work but over the holiday break but I managed to get the driver into shape using a handful of cheap discrete parts not only producing the correct phase and amplitude across 10 - 100 khz but also bipolar into a transmit coil grounded at one end. Bonus .. it doubles as a bipolar PI transmitter as well.
                      The supply voltage is 3 volts and the Tx current is +/- 450 ma. ... around 1.5 watts of power consumption.
                      Traces for 10 khz and 100 khz below. With gold prices at over 6000 AUD even a .01 gram spec is worth $2.
                      The software phase sweep function is stable to 100 khz ...and now the coil driver can reach that frequency ... so if you think that .01 gram specs are not worth it ...think again. Would you walk past a ten dollar note ? ( .05 gram )
                      The coil voltages and currents are below ... 100 Khz and 10 khz shown.
                      Click image for larger version

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                      • #86
                        Hi Paul,

                        nice, very nice. I am looking forward to see your solution. You must be Santa Claus - do you?
                        I have started a new thread for my own experiments and measurements.. With different approaches.
                        Aziz

                        Comment


                        • #87
                          Finished V1.0 of the code for the STM32H750 chip ... I use this board: Its a chinese board by weact studio.
                          I will do a bit of testing then release the firmware. It detects a 10 x 10 cm foil at nearly a meter.
                          There are no physical controls its all done over USB plugged into a phone/computer ... RTFM below.
                          note : It does not need the USB connection to run in default mode.


                          Here is the user manual :
                          USER_MANUAL.pdf

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                          and the plotter app in python for experimentation :

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                          • #88
                            ANALYSIS :

                            System Parameters

                            - ADC resolution: 16-bit (each ADC)
                            - Sample rate: 3.2 MHz
                            - TX frequency: 32 kHz
                            - Samples per TX cycle: 3.2 MHz ÷ 32 kHz = 100 samples
                            - Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each
                            - Base packet rate: 50 Hz
                            - Default reset divider: 5 → 10 Hz integration rate

                            Processing Gain Calculation

                            1. Samples per Integration Period

                            At 10 Hz reset rate:
                            - TX cycles per integration: 32,000 ÷ 10 = 3,200 cycles
                            - Samples per quadrant: 25 × 3,200 = 80,000 samples
                            - Total samples per I or Q channel: 160,000 (I+ and I- combined)

                            2. Coherent Integration Gain

                            For coherent (synchronous) integration:
                            - Signal adds linearly: N×
                            - Noise adds as RMS: √N×
                            - SNR improvement = √N

                            For N = 80,000 samples per half-cycle:
                            √80,000 ≈ 283× voltage gain
                            20 × log₁₀(283) ≈ 49 dB

                            3. Effective Bits Gained

                            Additional bits from oversampling/integration:
                            Extra bits = ½ × log₂(N) = ½ × log₂(80,000) ≈ 8.3 bits

                            4. Dual ADC Benefit

                            Two uncorrelated ADCs sampling same signal:
                            - SNR improvement: √2 ≈ 1.4× (3 dB)
                            - Additional resolution: ~0.5 bits

                            Total Effective Resolution

                            | Component | Bits |
                            |----------------------|----------|
                            | Base ADC resolution | 16 |
                            | Integration gain | +8.3 |
                            | Dual ADC | +0.5 |
                            | Effective resolution | ~25 bits |

                            Summary

                            Processing Gain ≈ 49-52 dB (at 10 Hz bandwidth)
                            Effective Resolution ≈ 24-25 bits equivalent
                            Noise Bandwidth ≈ 5 Hz (at 10 Hz reset rate)​

                            16-bit vs 24-bit ADC Analysis with ENOB

                            Typical ENOB Values

                            | ADC Type | Stated Bits | Typical ENOB | Notes |
                            |---------------------|-------------|--------------|--------------------------|
                            | STM32H750 @ 3.2 MHz | 16 | ~10-11 | High speed degrades ENOB |
                            | STM32H750 @ 1 MHz | 16 | ~12-13 | Better at lower speeds |
                            | Typical 24-bit SAR | 24 | ~16-18 | e.g., ADS1256 |
                            | High-end 24-bit Σ-Δ | 24 | ~20-21 | e.g., AD7768, ADS1262 |

                            ---
                            Case 1: STM32H750 Dual 16-bit ADC @ 3.2 MHz

                            Assumptions:
                            - ENOB ≈ 11 bits (realistic for 3.2 MHz)
                            - Dual ADCs, 80,000 samples per integration

                            | Component | Bits | Calculation |
                            |------------------|------------|------------------|
                            | Base ENOB | 11 | ADC datasheet |
                            | Integration gain | +8.3 | ½ × log₂(80,000) |
                            | Dual ADC | +0.5 | ½ × log₂(2) |
                            | Effective ENOB | ~19.8 bits | |

                            Dynamic range: 19.8 × 6.02 ≈ 119 dB

                            ---
                            Case 2: Single 24-bit ADC (Mid-range, ~17 ENOB)

                            Assumptions:
                            - ENOB ≈ 17 bits (typical ADS1256-class)
                            - Sample rate: 30 kSPS (typical for these ADCs)
                            - Single ADC, ~3,000 samples per 10 Hz integration

                            | Component | Bits | Calculation |
                            |------------------|------------|-----------------|
                            | Base ENOB | 17 | ADC datasheet |
                            | Integration gain | +5.8 | ½ × log₂(3,000) |
                            | Single ADC | 0 | No dual benefit |
                            | Effective ENOB | ~22.8 bits | |

                            Dynamic range: 22.8 × 6.02 ≈ 137 dB

                            ---
                            Case 3: High-end 24-bit Σ-Δ ADC (~20 ENOB)

                            Assumptions:
                            - ENOB ≈ 20 bits (AD7768-class)
                            - Sample rate: 256 kSPS
                            - 25,600 samples per 10 Hz integration

                            | Component | Bits | Calculation |
                            |------------------|------------|------------------|
                            | Base ENOB | 20 | ADC datasheet |
                            | Integration gain | +7.3 | ½ × log₂(25,600) |
                            | Single ADC | 0 | No dual benefit |
                            | Effective ENOB | ~27.3 bits | |

                            Dynamic range: 27.3 × 6.02 ≈ 164 dB

                            ---
                            Comparison Summary

                            | Configuration | Base ENOB | Samples/Int | Eff. ENOB | Dyn. Range |
                            |-----------------------|-----------|-------------|-----------|------------|
                            | STM32H750 dual 16-bit | 11 | 80,000 | ~20 bits | ~120 dB |
                            | 24-bit mid-range | 17 | 3,000 | ~23 bits | ~137 dB |
                            | 24-bit high-end | 20 | 25,600 | ~27 bits | ~164 dB |

                            ---
                            Key Insights

                            1. The STM32H750 approach recovers ~9 bits through massive oversampling (3.2 MHz vs 32 kHz) and synchronous integration
                            2. Diminishing returns on raw ADC bits: Going from 11→17 ENOB (6 bits more) only yields ~3 bits advantage after integration, because the faster ADC integrates more samples
                            3. Sample rate matters as much as resolution: The STM32H750's 3.2 MHz rate allows 80,000 samples vs 3,000 for a slower 24-bit ADC
                            4. Cost/complexity tradeoff:
                            - STM32H750: ~$5, integrated, simple
                            - 24-bit high-end: ~$20-50, external, complex analog design
                            5. Practical limit: At ~20+ effective bits, other factors dominate (thermal noise, component stability, interference)

                            Bottom line: The dual 16-bit @ 3.2 MHz approach achieves ~20 effective bits, competitive with mid-range 24-bit ADCs, at lower cost and complexity.​

                            Comment


                            • #89
                              Hi Paul,

                              "- Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each"
                              are you dividing the cycle into 4 parts (quadrants) and integrates the samples?
                              I+: integration of 25 samples
                              Q+: integration of 25 samples
                              I-: integration of 25 samples
                              Q-: integration of 25 samples
                              Do I understand it correct?

                              Comment


                              • #90
                                Originally posted by Aziz View Post
                                Hi Paul,

                                "- Quadrants per cycle: 4 (I+, Q+, I-, Q-) → 25 samples each"
                                are you dividing the cycle into 4 parts (quadrants) and integrates the samples?
                                I+: integration of 25 samples
                                Q+: integration of 25 samples
                                I-: integration of 25 samples
                                Q-: integration of 25 samples
                                Do I understand it correct?
                                Basically yes however the timing is important to remain sample aligned over every cycle. This is something that cannot be done in a soundcard as the sampling phases are not locked to the operating phase / transmit phase and this means the soundcard is a dead end for this type of detection method. When I was using the soundcard we came to realize the real time audio varies slightly because the transmit and receive codec clocks were not quite the same ...this is due to slight different click buffers at either end of a USB link.The AI devised a phase tracking loop to compensate but it only worked up to about 20 khz on a soundcard. The method I am using here will work up to the Nyquist sampling rate or about 1.6 Mhz or 3.2 MHz if I reconfigure the ADCs this well above the requirements for metal detectors of course. The analysis and the actual results show that a $5 Chip outperforms a $200 sound card in this application but you have to take into account that a sound card was not designed for this application.

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