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  • moodz
    replied
    Originally posted by Tinkerer View Post
    Hi Moodz,

    your progress goes in giant steps.

    The input voltage limit is 2.8 volts +/- ( tho I will limit to +/- 1 volt ) and the real sampling window is 5 uS though the internal rate is several Mhz. So your screen shots are at the optimal levels for input to this ADC.

    Do you have any specific reasons to limit the input voltage to +/- 1V? It would be much easier for me to have 2.8V +/- headroom.
    The CRO shots are raw and not amplified. I would much like to do some filtering and amplification, within the +/- 2.8V.

    Tinkerer
    The input is rated at 2 volts RMS ... 2.8 volts pp. Filtering is what the DSP does naturally ... amplification should not be needed that is why we are using 24 bits .... uVolt sensitivity with filtering by DSP. so if the signal is 1.000000 volts and it moves to 1.000001 volts ... should be able to detect it.( more complex than this but you get the drift )

    Moodz.

    Leave a comment:


  • moodz
    replied
    24 bit ADC

    Originally posted by hobbes_lives View Post
    Hey Moodz,

    What's the part number of the 24-bit ADC that you are now using?

    Wolfson Microelectronics WM8786

    I clock them at a 200x oversample for an effective external sample at 200 Khz = 5 us

    They are very easy to interface to FPGA in Master Mode as the chip generates all the timing signals and the data clocks itself in.

    moodz.

    Leave a comment:


  • hobbes_lives
    replied
    Which ADC?

    Hey Moodz,

    What's the part number of the 24-bit ADC that you are now using?

    Leave a comment:


  • Tinkerer
    replied
    24 bit ADC

    Hi Moodz,

    your progress goes in giant steps.

    The input voltage limit is 2.8 volts +/- ( tho I will limit to +/- 1 volt ) and the real sampling window is 5 uS though the internal rate is several Mhz. So your screen shots are at the optimal levels for input to this ADC.

    Do you have any specific reasons to limit the input voltage to +/- 1V? It would be much easier for me to have 2.8V +/- headroom.
    The CRO shots are raw and not amplified. I would much like to do some filtering and amplification, within the +/- 2.8V.

    Tinkerer

    Leave a comment:


  • moodz
    replied
    FPGA progress

    Good work Tinker ... the 24 bit ADC is up and running ... only took 10 lines of code .. could not believe it ... The 14 bit chip was more like 100.

    So I now have two fully differential 24 bit channels at my disposal. The chip was only $8.
    The protoboard, caps and pins added another $2 ... so a fairly cheap investment at $10 for 24bit goodness.

    The input voltage limit is 2.8 volts +/- ( tho I will limit to +/- 1 volt ) and the real sampling window is 5 uS though the internal rate is several Mhz. So your screen shots are at the optimal levels for input to this ADC.

    The pic below shows the 4 channels purple, yellow, white and red running on the VGA display output from the FPGA engine. I have not put a real signal yet as I tried this with the first chip and spiked it .... some flyback from the coil must have leaked ...
    I am sure a liberal sprinkle of diodes will fix this.

    The display shown is at maximum resolution 64 uV per division. Equivalent to a few hundred uV peak to peak. The Channel 1 an 2 input are open so we are just looking at noise and EMI hitting the ADC inputs. Did not need to touch the DSP code.

    I will now have to include the ADC in the front end circuitry ( maybe on a chip carrier so it can be easily replaced if it gets spiked ).

    Moodz

    Click image for larger version

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    Leave a comment:


  • Tinkerer
    replied
    S/N, INCREASING SIGNAL AMPLITUDE

    Moodz,

    sampling with 24 bit really opens a new horizon.

    I have been improving on the S/N a bit. More signal amplitude to start with.

    Attached are 3 scope pictures of the RE_PI Coil # 5 output NO AMPLIFICATION.

    Settings: Vertical 200mV, Horizontal 5uS

    Pictures:
    No Target
    4"x4" alu foil
    4"x5" 1/16th steel plate.

    Targets 60mm above the coil.

    The coil is sitting on slightly magnetic red fire bricks, 35cm above the concrete floor that contains re-bar mesh. This serves as simulation of iron mineralized ground.

    These targets can be considered near maximum range.

    Tinkerer
    Attached Files

    Leave a comment:


  • Tinkerer
    replied
    TMPI COILS

    Originally posted by IBGold View Post
    Hi Tinkerer,
    The best coils are the ones that every detail is done with precision I can take up to four days to make one coil but every one uses the best materials that I can source for the job and great care is taken on the assembly and the way it is done but as my time is my own and the coils are not commercial but for me it does not matter I have the best coils I can get and the fun of making them but I will say that the 3 to 1 rectangular and the Duel Field are my favorites and they blow commercial coils away on performance its all in the construction details, but I am not doing it as a living, I am about to start on a prototype differential mono for Moodz to try when we tidy up a few details.
    Regards, Ian.
    Hi Ian,

    I fully agree with you. To build a single good coil can absorb days of work. This is why I believe that to sell coils, they need to be build by a commercial outfit, that can invest in research and development, tools, gigs and testing installations.
    With all that it is still hard to produce high quality, reliable, long lasting coils at a good price.

    Are there any recommendable coil manufacturers in Australia? Anywhere else?

    Where could one order say 100 coils, made to stringent tolerances?

    Tinkerer

    Leave a comment:


  • moodz
    replied
    FPGA update

    IBGold is working on a coil to use with the TMPI / FPGA .... thanks Ian. I have started looking more closely at the Tinkerer and/or Aziz descrimination method and one thing becomes very clear ... the current system has a 14 bit ADC however in order to get sufficient sensitivity the gain is set to 100. This is good for sensitivity but is bad for dynamic range. At a gain of 100 the dynamic range is reduced to about 12 millivolts with a sensitivity of a few microvolts however this is not really able to handle the sampling requirements when you want to resolve microvolt levels on a several hundred millivolt waveform.
    So the ADC input for the DSP system now moves to 24 BITS
    The internal bit length of the DSP code in the FPGA is 32 bit so this fits in with no code changes.
    This enables the system to handle an input of 2 volts but still resolve down to uVolt levels. The base sample rate is approx 6 MSPS. Because the resolution of the ADC is now 1000 times higher than the 14 bit ADC ... the gain can now be minimised or dispensed with. The 24 bit ADC has dual differential inputs so no changes are required to work with the differential front end.

    Below is a pic of the board ( 1 inch square ) and fitted to the FPGA board.
    There arent many pins because the data is clocked out serially by a 40 Mhz clock. There are separate supplies and grounds for the analog inputs on the 24 bit chip ... not connected in the pic yet.

    moodz

    Click image for larger version

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    Click image for larger version

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    Leave a comment:


  • IBGold
    replied
    Hi Tinkerer,
    The best coils are the ones that every detail is done with precision I can take up to four days to make one coil but every one uses the best materials that I can source for the job and great care is taken on the assembly and the way it is done but as my time is my own and the coils are not commercial but for me it does not matter I have the best coils I can get and the fun of making them but I will say that the 3 to 1 rectangular and the Duel Field are my favorites and they blow commercial coils away on performance its all in the construction details, but I am not doing it as a living, I am about to start on a prototype differential mono for Moodz to try when we tidy up a few details.
    Regards, Ian.

    Leave a comment:


  • moodz
    replied
    Originally posted by Tinkerer View Post
    Thanks for the update, Moodz,

    I would like to add to your last sentence:COILS

    The best signal processing will not be able to make a good detector out of a bad coil. A GOOD COIL IS NEEDED.
    Anybody is capable of building a more or less coil. but to build a good coil, considerable experience is needed.
    To build a really good coil cost efficiently, proper installations and testing facilities are needed.

    I therefore propose:

    We build a few coils of different parameters as open source projects, here on the forum.
    Once the FPGA signal processing block is fully developed and for sale, some of the excellent coil manufacturers may be interested in producing the specific coils for the TMPI.

    In fact, I would be much interested to know who the coil manufacturers are.

    Which coils are recommended by forum members?

    Which coils are the best?

    Is it worth paying for the best coil? How much difference is there in coil performance with the same machine?

    Tinkerer
    Good point Tinkerer ... dont forget FRONT ENDS ... the FPGA will only do the digital bit past the ADC.

    Moodz.

    Leave a comment:


  • Tinkerer
    replied
    COILS FOR THE TMPI

    Originally posted by moodz View Post
    .... after another session of slaving away over a hot computer more progress on the FPGA project. The 32 bit cpu can now 'see' the DSP rams ... which is pretty cool since the DSP is running at several mips and writing / reading those rams continuously ...however we dont want the CPU to interfere with the DSP process. The DSP processing will have a very analogue feel to it ..... I am even considering feeding some of the channels out of a DAC into a conventional meter for a bit of nostalgia.
    The digital CRO function now has more controls with vertical channel offset controls from the CPU and will be controlled by command via internal GPIO ports from the CPU. The CRO function is the best idea I have ever had ... it just makes checking the coil performance so easy ... you can see straight away if there is anything wrong with your rig. The DSP timing now autotracks within microvolts however there will be a track locking button that will track lock user selected sample channels from the 512 available. ( ie any of 1 to 512 channels can be selectively locked. ) This is important because with huge effective oversampling the really faint targets can be resolved in huge noise ( EMI, hotrocks, ground effect etc ).
    All the code still fits into the cheapy FPGA chip .... a battery powered generic board slightly larger than a matchbox is available for less than $50 that will run the current build with all DSP / CRO features enabled. All that is required is the front end ( switching mosfet, ADC and protective diodes) and coil of your choice. The total cost of a detector would truly be below $100 but would rival a machine that costs 50 times more ( presuming you make your own coil )

    cheers for now.

    Moodz.
    Thanks for the update, Moodz,

    I would like to add to your last sentence:COILS

    The best signal processing will not be able to make a good detector out of a bad coil. A GOOD COIL IS NEEDED.
    Anybody is capable of building a more or less coil. but to build a good coil, considerable experience is needed.
    To build a really good coil cost efficiently, proper installations and testing facilities are needed.

    I therefore propose:

    We build a few coils of different parameters as open source projects, here on the forum.
    Once the FPGA signal processing block is fully developed and for sale, some of the excellent coil manufacturers may be interested in producing the specific coils for the TMPI.

    In fact, I would be much interested to know who the coil manufacturers are.

    Which coils are recommended by forum members?

    Which coils are the best?

    Is it worth paying for the best coil? How much difference is there in coil performance with the same machine?

    Tinkerer

    Leave a comment:


  • Tinkerer
    replied
    Originally posted by WM6 View Post
    Great work moodz. Thank you to deal with us.

    Only, after all your and Thinkerer threads I am a bit confusing at the end.

    What parts, boards or module to use/buy and what of stages (eg. frontend) to build and how interconnected all this?

    Can you be a little more explicite and give us some summary of project?

    A lot of good ideas in the future.
    Hi WM6,

    you make a valid observation. The FPGA signal processing is only a part of a whole detector.

    The detector also needs hardware.
    It needs an ergonomic stem assembly.
    A good coil.
    An efficient power supply and battery combination.

    The detector also needs an operator interface.

    How should this interface be? Only audio? There are many variations in audio output possible. single tone? dual tone? variable pitch?
    What about FE identification? Just a red LED? An "ignore FE" setting?

    This is where YOU and other experienced metal detector operators come in. What are YOUR wishes? How would YOU like the detector to be?

    The more bells and whistles are added, the higher the cost.
    Color screen with back light? GPS interface?
    The lists are endless.
    In general bells and whistles sell better, even if cost is higher.

    What about a high efficiency, high sensitivity detector, with only essentials, to keep cost down?

    There are many questions that ask for answers. Feedback will generate the best results.

    Any suggestions?

    Tinkerer

    Leave a comment:


  • WM6
    replied
    Originally posted by moodz View Post
    ..

    All the code still fits into the cheapy FPGA chip .... a battery powered generic board slightly larger than a matchbox is available for less than $50 that will run the current build with all DSP / CRO features enabled. All that is required is the front end ( switching mosfet, ADC and protective diodes) and coil of your choice. The total cost of a detector would truly be below $100 but would rival a machine that costs 50 times more ( presuming you make your own coil )

    cheers for now.

    Moodz.
    Great work moodz. Thank you to deal with us.

    Only, after all your and Thinkerer threads I am a bit confusing at the end.

    What parts, boards or module to use/buy and what of stages (eg. frontend) to build and how interconnected all this?

    Can you be a little more explicite and give us some summary of project?

    A lot of good ideas in the future.

    Leave a comment:


  • simonbaker
    replied
    Outstanding stuff. I expect we'll be seeing some new performance benchmarks from these designs, especially discrimination.

    -SB

    Leave a comment:


  • moodz
    replied
    FPGA progress report

    .... after another session of slaving away over a hot computer more progress on the FPGA project. The 32 bit cpu can now 'see' the DSP rams ... which is pretty cool since the DSP is running at several mips and writing / reading those rams continuously ...however we dont want the CPU to interfere with the DSP process. The DSP processing will have a very analogue feel to it ..... I am even considering feeding some of the channels out of a DAC into a conventional meter for a bit of nostalgia.
    The digital CRO function now has more controls with vertical channel offset controls from the CPU and will be controlled by command via internal GPIO ports from the CPU. The CRO function is the best idea I have ever had ... it just makes checking the coil performance so easy ... you can see straight away if there is anything wrong with your rig. The DSP timing now autotracks within microvolts however there will be a track locking button that will track lock user selected sample channels from the 512 available. ( ie any of 1 to 512 channels can be selectively locked. ) This is important because with huge effective oversampling the really faint targets can be resolved in huge noise ( EMI, hotrocks, ground effect etc ).
    All the code still fits into the cheapy FPGA chip .... a battery powered generic board slightly larger than a matchbox is available for less than $50 that will run the current build with all DSP / CRO features enabled. All that is required is the front end ( switching mosfet, ADC and protective diodes) and coil of your choice. The total cost of a detector would truly be below $100 but would rival a machine that costs 50 times more ( presuming you make your own coil )

    cheers for now.

    Moodz.

    Leave a comment:

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