"Beyond" TGSL ....

[Nicko]

Nothing wrong with using a high resolution ADC ...the higher bits means less amplification on the front end. More gain means more noise and less dynamic range. Once the signal is digitised the noise is 'frozen'.
The first amplifier in any analogue signal chain will determine the noise performance for any subsequent analogue processing.
I find it amazing that some of you analogue guys are so attached to your single ended unbalanced noisy shielded frontends. Balanced modulators / demods , amplifiers, impedance matching etc have been around for as long as I can remember in audio and RF ( and thats as long as the little glass tubes with heaters in em ) but this 'technology' just has not made it into metal detectors.
A 'proper' front end for an ADC is not very difficult ... professional RF/audio has been doing since the last century ... with one critical factor ... the first amp or balanced mod input is differential as this is what will set the noise floor of subsequent processing operations.
On single ended inputs why do you need Faraday sheilding ? ... because the input circuit is susceptable to coupled voltage / noise fields and capacitive coupling to other conductors like the ground ... a Faraday shield is an electrostatic shield not a magnetic shield ... so why design a circuit that detects voltage fields when it is supposed to detect magnetic fields ... sheeeesh ... nough said already.

Oh dear. Firstly, I'm not "an analogue guy" - most of what I do is high(ish) speed digital - used to be avionics/FBW. However, you make the point yourself that "professional RF/audio has been doing since the last century ". The key word here is "professional". Design and layout of this stuff along with 4+ layer boards, BGAs, very fine pitched SMDs etc. is still way way beyond the tools, technical capabilities & budgets of most home constructors. For goodness sake, even 2 layer boards are rarely used here... mobile phones (typical example of a fully digital signal path) use between 4 & 8 layer boards, mostly BGAs and a 3 mil resolution.

Everything here is a compromise - it has to fit what is reasonable for people (who are probably 99% amateurs) to do. I have 20-odd years of experience, SMT IR reflow ovens, micro-manipulators etc. in my workshops, along with a stack load of modern test kit - none of the other engineers I know has facilities anything like that at their home workshops, but even I would be wary of taking a route that was overtly over-engineered for domestic implementation. Its absolutely nothing to do with what "professional RF/Audio" engineers do, and everything to do with what is practical.

My case is that I don't believe you need all those bits when all that you are interested in is a tiny part of the overall dynamic range. Although going on about "24 bits" or whatever sounds very impressive, it isn't very useful - there's a lot of entropy in there. Basic engineering. KISS. http://en.wikipedia.org/wiki/KISS_principle

Cheers!

[simonbaker]

Hi all,



this task is destined for a digital laptop TGSL version.
Just feed the X and Y demodulated signals into left and right input channel of the sound card. Then a digital lock-in amp can be done on the X/Y-signals.
Hardware:
- LC-oscillator (trivial)
- X/Y demodulator clock generation (trivial)
- (Buffered) RX in-phase signal X (trivial)
- (Buffered) RX quadrature signal Y (trivial)

The hardware and the software isn't much complex. You need only one sound card (internal). The output of the sound card can be used for audio signalling. But the performance will be outstanding!!!!

Aziz

I know Aziz, you're the leader there! But you stopped, I never learned the final results or saw it in field. Still interested.

I still would like to work with microprocessor to see what's possible.

Like this one -- good for anything?
http://www.geotech1.com/forums/showthread.php?t=16809

If you sampled at output of LM308s, you hardly need any speed or bit depth -- probably any old pic would do -- you could do some detection logic, but too late to adjust the filter characteristics much.

Cheers,

-SB

[simonbaker]

Oh dear. Firstly, I'm not "an analogue guy" - most of what I do is high(ish) speed digital - used to be avionics/FBW. However, you make the point yourself that "professional RF/audio has been doing since the last century ". The key word here is "professional". Design and layout of this stuff along with 4+ layer boards, BGAs, very fine pitched SMDs etc. is still way way beyond the tools, technical capabilities & budgets of most home constructors. For goodness sake, even 2 layer boards are rarely used here... mobile phones (typical example of a fully digital signal path) use between 4 & 8 layer boards, mostly BGAs and a 3 mil resolution.

Everything here is a compromise - it has to fit what is reasonable for people (who are probably 99% amateurs) to do. I have 20-odd years of experience, SMT IR reflow ovens, micro-manipulators etc. in my workshops, along with a stack load of modern test kit - none of the other engineers I know has facilities anything like that at their home workshops, but even I would be wary of taking a route that was overtly over-engineered for domestic implementation. Its absolutely nothing to do with what "professional RF/Audio" engineers do, and everything to do with what is practical.

My case is that I don't believe you need all those bits when all that you are interested in is a tiny part of the overall dynamic range. Although going on about "24 bits" or whatever sounds very impressive, it isn't very useful - there's a lot of entropy in there. Basic engineering. KISS. http://en.wikipedia.org/wiki/KISS_principle

Cheers!

Hi Nicko!

The front end of an MD can have an enormous dynamic range -- I don't know what it is, but maybe even exceeds 24 bits. I would be comfortable with the extra bits if they don't hurt. But if requires all that high-tech equipment/materials to use properly, that's scary.

BTW: is 24 bits essentially 144 db range? And 16 bits 96 db range?


It's interesting that "entropy" can actually help you when you have less bits to sample with. If you're trying to measure small signals smaller than your 1 bit level, adding some noise can actually improve your measurement as long as you have enough time available to average the noise out. So perhaps in our case fewer bits OK. I'd still like to have extra bits if no downside though.

Just rambling... back to my TGSL PCB mysteries, one puzzle taking longer than I thought, will it defeat me???

-SB

[Aziz]

Hi Simonbaker,

I know Aziz, you're the leader there! But you stopped, I never learned the final results or saw it in field. Still interested.

I still would like to work with microprocessor to see what's possible.

Like this one -- good for anything?
http://www.geotech1.com/forums/showthread.php?t=16809

If you sampled at output of LM308s, you hardly need any speed or bit depth -- probably any old pic would do -- you could do some detection logic, but too late to adjust the filter characteristics much.

Cheers,

-SB

some corrections (after looking into TGSL schematics):
The hardware is even much simpler than described above: I don't need the demodulators at all.

Just:
LC-Oscillator
RX Pre-amp (signal X)
TX Phase shifter (+90° +/-10° ground balance) (reference Y)
9V Battery block with simple bipolar power supply splitter (max. 5-10 mA).

The demodulation will be done by the software . This is so much simple but interesting to me to just try it out for fun. Even it delays my other projects.

Aziz

PS: Your question regarding the µP board. I don't know. It's much simpler to use the laptop and sound card.

[simonbaker]

Hi Simonbaker,



some corrections (after looking into TGSL schematics):
The hardware is even much simpler than described above: I don't need the demodulators at all.

Just:
LC-Oscillator
RX Pre-amp (signal X)
TX Phase shifter (+90° +/-10° ground balance) (reference Y)
9V Battery block with simple bipolar power supply splitter (max. 5-10 mA).

The demodulation will be done by the software . This is so much simple but interesting to me to just try it out for fun. Even it delays my other projects.

Aziz

PS: Your question regarding the µP board. I don't know. It's much simpler to use the laptop and sound card.

Good stuff - let us know how it goes, and any circuit diagrams.

-SB

[Aziz]

Hi Simon,

Good stuff - let us know how it goes, and any circuit diagrams.

-SB

sure, spice files included! I have just startet the tiny project .

But I need generally some input on the ground balance phase shift pot:
Is +/-10° phase shift range too much? Which values are appropriate? So I can dimension the circuit correctly.

I will make a single-ended front-end amplifier for the simplicity (dual op-amp). The other op-amp will be used to control the ground balance and the 90° phase shift.
Allmetal/Discrimination should be adjusted in the software only. Only the ground balance pot will be adjustable to the operator (well, could also be made in the software, auto-ground-balance).

If it promisses some potential, I will replace the single-ended front-end amplifier into a low-noise differential amplifier (SSM2019/INA163, but they suck 10 mA).

Now, let's start...

Aziz

[Aziz]

Digital Laptop VLF First Cut Finished

Hi all,

Ok, the first cut of the design is finished now. But I was not happy with the distortions of the LC-oscillator from TGSL. So I made a modified Hartley LC-oscillator with it's own power supply voltage regulator (simple Zener-diode stabilized). It is driven with double voltage (bipolar power supply) and achieves at least 30 V pp coil voltage or 60 mA pp coil current. The LC-oscillator is quite efficient and consumes less than 2 mA. The TX coil is a center-tapped coil and delivers perfect sine waves (one of the advantages of balanced architectures). The high TX coil voltage must be divided via capacitor divider into some reasonable level before it is fed to the phase shifter. The output of the phase shifter is fed into right input channel of the sound card.
The amplifier is trivial and it's output is fed to the left input channel of the sound card. The single-ended RX front-end needs a simple RX coil (no tap).

Below is a short view of the complete schematics. I will provide a spice file later.
Cheers,

Aziz

[moodz]

Oh dear. Firstly, I'm not "an analogue guy" - most of what I do is high(ish) speed digital - used to be avionics/FBW. However, you make the point yourself that "professional RF/audio has been doing since the last century ". The key word here is "professional". Design and layout of this stuff along with 4+ layer boards, BGAs, very fine pitched SMDs etc. is still way way beyond the tools, technical capabilities & budgets of most home constructors. For goodness sake, even 2 layer boards are rarely used here... mobile phones (typical example of a fully digital signal path) use between 4 & 8 layer boards, mostly BGAs and a 3 mil resolution.

Everything here is a compromise - it has to fit what is reasonable for people (who are probably 99% amateurs) to do. I have 20-odd years of experience, SMT IR reflow ovens, micro-manipulators etc. in my workshops, along with a stack load of modern test kit - none of the other engineers I know has facilities anything like that at their home workshops, but even I would be wary of taking a route that was overtly over-engineered for domestic implementation. Its absolutely nothing to do with what "professional RF/Audio" engineers do, and everything to do with what is practical.

My case is that I don't believe you need all those bits when all that you are interested in is a tiny part of the overall dynamic range. Although going on about "24 bits" or whatever sounds very impressive, it isn't very useful - there's a lot of entropy in there. Basic engineering. KISS. http://en.wikipedia.org/wiki/KISS_principle

Cheers!

Hiya Nicko & others ( including analogue guys ) .. All valid points and correct however one piece of advice I can pass on to amateurs ... and I include myself in this description is that you can easily ignore the complexity of some things and leapfrog to a desired outcome. The KISS principle is correct however so is the expression dont reinvent the wheel ( or keep reinventing it ) It is a hell of alot of work to build a nice low noise analogue design, spend hours building it, tweaking it, casing it, winding the coils, sheilding it, more tweaking and more tweaking to only achieve a mediocre result. For some the fun is in the actual building and sometimes rebuilding over and over. Others spend alot of time finding exotic low noise components or doing simulations over and over to demonstrate some sort of noise improvement or whatever. For me it is to build it once, get it working then make it better. Being basically lazy if I can move most of the tweaking that has to be done into the code domain then I can maximise the amount and type of tweaking that can be done. So my design is very Q&D ( quick and dirty ) a single low noise diff amp with minimal components and a cheap differential input 24 bit amp. I have not made a board in 15 years. I just plonk the parts upside down on a piece of PCB and drop epoxy or hotglue or silicon or whatever and thats it.

The amp costs less than $10 and the ADC is $5 ( with dual differential inputs )
The amp is a DIP so thats no problem ... the ADC is surface mount but easier to solder than a DIP if you follow my technique elsewhere in this forum.

Yeh Yeh ... I use an FPGA ....oooooohhhhhhh .... oh the complexity .... well let me tell you now .... I have programmed PICs and they are 10 times harder to get going than an FPGA design .... The FPGA board is $60 ...

Below is the HDL code to grab two 24 bit words from a Wolfson ADC every 5 us ( 192000 samples / sec ) .... the chip outputs the data in serial so this code clocks the chip correctly and de-serialises the samples into two signed 24 bit words ( well actually two 36 bit words as that is what I do the processing on ) Now unless your CPU has dedicated hardware like some DSPs you are going to be very hard pressed to do this on a PIC. and I wont even mention trying to deal with the data stream.
There is very little code in this sample that is actually required to drive the ADC.

----------------------------------------------------------------------------------
-- Company:
-- Engineer: Moodz
--
-- Create Date: 140710
-- Design Name: ADC24_WOLFSON8786_SLAVE
-- Module Name:
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision: 1.0
-- Revision
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--library UNISIM;
--use UNISIM.VComponents.all;

entity ADC24_WOLFSON8786_SLAVE is
Port ( MCLK : in std_logic; --pin 9 --36.864 Mhz 192fs
LRCLK : out std_logic; --pin 6
DOUT : in std_logic; --pin 7
BCLK : out std_logic; --pin 8
LEFTval : out std_logic_vector(35 downto 0);
RIGHTval : out std_logic_vector(35 downto 0)
);
end ADC24_WOLFSON8786_SLAVE;

architecture RTL of ADC24_WOLFSON8786_SLAVE is
signal bitclock : std_logic;
signal sBITS : std_logic_vector(47 downto 0);

shared variable clkcount : integer range 0 to 47 := 0;

begin

BCLK <= bitclock;

clock: process(MCLK)
variable MCLKcount : integer range 0 to 1 := 0;
begin
if rising_edge(MCLK) then
MCLKcount := MCLKcount + 1;
if MCLKcount = 1 then
bitclock <= not bitclock;
end if;
end if;
end process;

adcdata: process (bitclock)
begin
if falling_edge(bitclock) then --LRCLK stuff happens on falling edge
if clkcount > 0 then
clkcount := clkcount - 1;
LRCLK <= '0';
elsif clkcount = 0 then
clkcount := 47;
LRCLK <= '1'; --LRCLK only has to be high for 1 BCLK in slave mode
LEFTval(23 downto 0) <= sBITS(47 downto 24);
if sBITS(47) = '0' then
LEFTval(35 downto 24) <= "000000000000";
else
LEFTval(35 downto 24) <= "111111111111";
end if;
RIGHTval(23 downto 0) <= sBITS(23 downto 0);
if sBITS(23) = '0' then
RIGHTval(35 downto 24) <= "000000000000";
else
RIGHTval(35 downto 24) <= "111111111111";
end if;
end if;
end if;
end process;

getbit: process (bitclock)
begin
if rising_edge(bitclock) then
sBITS(clkcount) <= DOUT;
end if;
end process;
end RTL;

------------------------------------------------------------------------

AND not only that but a FRONTEND for PI or VLF ( VLF tx not shown ) This shows the differential Pulse drivers ... diff amp and bipolar supply generator for the amp. The bipolar supply is generated by clocking a mosfet driver chip into cap /diode networks in usual fashion. The FPGA provides the clock and usually synchronous with TX pulses or whatever you like. For VLF a separate coil with 24 bit DAC and linear amp provides the TX signal.

[moodz]

here's a test for differential input .....

Hi moodz:

question: dfbowers recently experimented with coil connections for the TGSL where the RX coil is not grounded at all, only the shield around the cable is grounded (and one of the TX wires). Does that meet your requirements for differential inputs?

Also: what do you think would be the minimal, easiest microprocessor for trying a digital TGSL, meaning sampling the 15 kHz RX signal directly and doing everything digital after that. Low power would be very important too.

Regards,

-SB

Take a 1.5 volt battery and 1k resistor. Connect -ve of battery to "earth".Connect other end to approximate centre of coil ... if the signal jumps significantly your circuit is not 'balanced' or differential as common mode rejection should not respond significantly to the voltage bias. For a digital TGSL I would put everything into an FPGA as it can drive the high performance ( or low performance ) ADCs and DACs. See my other post on this thread. Does PI as well as a side benefit.

Moodz

[Nicko]

Being fairly new to MD design, I have also been amazed how the front-end design has changed little over the years - even in simple ways, like driving FETs properly.

In other projects where I'm driving half or full bridges or GDTs, I use either the Maxim TC chips moodz uses, or the Texas UCC27423/4/5 series (two drivers in single chip - the "5" version has one inverting and one non-inverting driver, ideal for a half-bridge or GDT and which allows you to insert a simple dead-time control to obviate the risk of shoot-through. These things are cheap (a couple of dollars), better than most discrete alternatives, and take up less real-estate. http://www.farnell.com/datasheets/53984.pdf

A little fun project where I've done dead-time in a novel way is at http://4hv.org/e107_plugins/forum/fo...opic.php?90019 - follow the links at the top of the post to get to the original thread on dead-time control.

Apologies to those not in the UK - my avatar may seem "unusual" unless you are a "Father Ted" fan...

Cheers!

[moodz]

Apologies to those not in the UK - my avatar may seem "unusual" unless you are a "Father Ted" fan...

Cheers!

....ah and I thought that was you after you had applied the wet finger test to see if the coil was getting warm.

[simonbaker]

All good stuff and good directions to go forward with.

However I must reinvent the wheel. A personality flaw, too late to change.

Cheers!

-SB

Anyone need some wheels?

[Aziz]

Hi all,

as you can see in my last post, the reference TX signal (reference Y) and RX signal (signal X) will be fed into the sound card input line. These represent not the complex channels X and Y. Only a basic lockin-amplifier can be realized with these two input signals.

For a true complex lock-in amplifier, we would need:
- Signal Channel (S)
- TX Channel in-phase (X),
- TX Channel quadrature-phase (=in-phase+90 degree) (Y)
Damn, but we have only two input ADC channels. Three would be required.

Therefore we have to make our own quadrature-phase channel from the in-phase channel using digital signal processing techniques. All we need is to do a phase shift of the TX channel by 90 degree. Damn, we are inventing the wheel digitally: a digital phase shifter.

I am soldering the new schematics. My test software needs also some changes. When it is finished, tested and finalized, I will put the final spice file and the schematics here. Stay tuned...

Aziz

[simonbaker]

Hi all,

as you can see in my last post, the reference TX signal (reference Y) and RX signal (signal X) will be fed into the sound card input line. These represent not the complex channels X and Y. Only a basic lockin-amplifier can be realized with these two input signals.

For a true complex lock-in amplifier, we would need:
- Signal Channel (S)
- TX Channel in-phase (X),
- TX Channel quadrature-phase (=in-phase+90 degree) (Y)
Damn, but we have only two input ADC channels. Three would be required.

Therefore we have to make our own quadrature-phase channel from the in-phase channel using digital signal processing techniques. All we need is to do a phase shift of the TX channel by 90 degree. Damn, we are inventing the wheel digitally: a digital phase shifter.

I am soldering the new schematics. My test software needs also some changes. When it is finished, tested and finalized, I will put the final spice file and the schematics here. Stay tuned...

Aziz

Hi Aziz:

You decided not to drive TX coil from audio output this time I see. Any reason?

Also, you are not simulating a TGSL if you use lock-in amplifier arithmetic. TGSL uses the two channels a little differently. The two SDs are not exactly 90 degrees apart. The DISC channel sync pulse phase is adjusted by the DISC pot, and the GB channel sync pulse phase is adjusted by the GB pot -- so they can have a quite variable phase relationship.

Instead of quadrature arithmetic to derive the amplitude and phase, the two demodulated RX signals are low-bandpass filtered, amplified, and applied to a "threshold logic" detector, which triggers only when both signals go above an adjustable threshold. The result is a binary signal, from -5 to approx 0 volts.

The binary signal is actually applied to a low pass filter, whose output is applied to another threshold detector. So the pulses actually look like an RC integrated square wave -- a "exponential triangle" wave. Only the pulses that have time to rise above the threshold will make an audio tone. So it is kind of a "pulse-width" filter, only allowing a pulse longer than some time increment DT to pass (and subtracting DT from the pulse width).

That can all be modeled in software -- doesn't mean it is a good digital design, but would be interesting to model the behavior of an analog TGSL.

-SB

P.S. your oscillator seems to have nice properties.

[Aziz]

Hi Aziz:

You decided not to drive TX coil from audio output this time I see. Any reason?

The reason? purely out of curiosity and just for fun.

Now the real reason:
1) Getting rid of the frequency shift/phase shift/amplitude change of the driven TX coil voltage caused by ground and targets. As the reference in-phase and quadrature-phase signals were generated internally (digital), the RX coil is sensing the TX coil changes due to resonant tank changes. The mismatch between real-life signal data and digital part will be minimized. This should make the detector more stable. I should look for a regulated LC oscillator to keep the TX coil voltage amplitude constant. This should make the detector even more stable. Frequency/phase shifts doesn't matter as the TX reference will be used. So the lock-in amplifier locks onto the TX oscillator instead to the internally generated reference frequency.

I do not really need an external hardware even. It can also be externally driven by the sound card. The RX signal and TX coil voltage needs to be fed into the sound card. The 24-bit sound-card has enough dynamic range to allow the signals unamplified or active buffered.

The active circuit just increases the TX output power and amplifies the signals.

2) didn't do that before (new)

3) can I top the 1 EUR coin detection > 50 cm?

Really funny thing.
Aziz