Originally posted by Mdtoday
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This is another example of the most appropriate technology being applied to the task at hand... Integration in the analog domain to allow digitizing a much lower clock speeds... clock speed means power dissipation... lots of it. Allowing ADC clocking a a much lower frequency means less power consumed (one of the military goals for a field mine detector). Also it decouples the time domains of the digital and analog processing. This allows the DSP processor to have reduced clocking needs. The DSP does not have to calculate/generate all of the timing signals... that task is relegated to an FPGA.

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