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  • KingJL
    replied
    Major restructure of port interface

    I have restructured the I/O interface for control of the TX by the embedded CPU. All control I/O with the module is now via a register array (currently 6 x 32 bit registers). The initial operating parameters are set by a set of generic's for the entity definition. This will allow the timing functions to be exercised without the inclusion of the embedded cpu or with minimal code for the embedded cpu.

    Also the constraints file (CMOD-A7_master.xdc) has been modified to connect the output ports to the TX_IF_CMOD-A7 board J1.

    The link to the new zip (Vivado_Bipolar_TX(6-13-2019).zip) file containing the Vivado project files is:

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    I have been fighting the XADC for the last few days... finally have a configuration that functions correctly in a behavioral simulation in Vivado.
    Thanks JL, I will have a play with this, I had a few problems with my Vivado install and my server firewall so not had much time to look at the design suite but all up and running now and Vivado does look quite good. I'll let you know how it goes

    cheers

    Mdtoday

    Leave a comment:


  • KingJL
    replied
    Originally posted by KingJL View Post
    ... need to wrap my head around the XADC to acquire the samples...
    I have been fighting the XADC for the last few days... finally have a configuration that functions correctly in a behavioral simulation in Vivado.

    In ip catalog select the FPGA Features and Design -> XADC -> XADC Wizard, and then set up the tabs as follows:
    Basic:
    Interface Options = DRP, Timing Mode = Event Mode, Startup Channel Selection = Single Channel,
    DRP Timing Options: DCLK =100 MHZ, ADC Conversion Rate = 1000, KSPS Aquisition Time = 4
    AXI4STREAM= Enable AXI4Stream unchecked, Control/StatusPorts = nothing checked
    Event Mode Trigger = convst in
    Sim File Selection = Default, Analog Stimulus File = Design, Sim File location = ./, Waveform Type = CONSTANT

    ADC Setup: Channel Averaging = None, Nothing else checked

    Alarms: All unchecked

    Single Channel: VAUXP4 VAUXN4, Channel Enable checked, Bipolar checked


    I also have an uncluttered text (Design.txt) file to use instead of the generated design.txt file. You can change the values for the VAUXP[4] and VAUXN[4] and see the output of the ADC change.

    New link to the Vivado project zip files dated 6-4-2019: https://drive.google.com/file/d/1t4Z...ew?usp=sharing
    Attached Files

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    That is the problem with all of the integrated H-bridge drivers that I have investigated... the capacitive bootstrap. I did see a driver series (I think Analog Devices) that was a fully integrated isolated H-bridge driver with in-chip pulse transformers that did not use the capacitive bootstrap, but have not got around to checking them out.
    Yes, this is what I have found

    JL I have sent you a PM

    cheers

    Mdtoday

    Leave a comment:


  • moorejl57
    replied
    Originally posted by Mdtoday View Post
    I have tried this unit and the Bootstrap circuit caused issues, so I put it aside a few months ago, might revisit it but not much time atm.

    there is a project thread under STM32 somewhere in the Tech forum started awhile back but it went quiet.

    My stm32 powered pi detector by GTdavid


    cheers

    Mdtoday
    Originally posted by KingJL View Post
    That is the problem with all of the integrated H-bridge drivers that I have investigated... the capacitive bootstrap. I did see a driver series (I think Analog Devices) that was a fully integrated isolated H-bridge driver with in-chip pulse transformers that did not use the capacitive bootstrap, but have not got around to checking them out.
    Thanks for the info and for saving me some headaches. I was ready to give this a go.

    Leave a comment:


  • KingJL
    replied
    Originally posted by Mdtoday View Post
    ... and the Bootstrap circuit caused issues, ...
    That is the problem with all of the integrated H-bridge drivers that I have investigated... the capacitive bootstrap. I did see a driver series (I think Analog Devices) that was a fully integrated isolated H-bridge driver with in-chip pulse transformers that did not use the capacitive bootstrap, but have not got around to checking them out.

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by moorejl57 View Post
    What do you think about this [ATTACH]46559[/ATTACH] integrated driver/mosfet bridge for a bipolar setup? It seems reasonable in cost $6 and can be directly driven by a microcontroller 3.3V output.
    I have tried this unit and the Bootstrap circuit caused issues, so I put it aside a few months ago, might revisit it but not much time atm.

    there is a project thread under STM32 somewhere in the Tech forum started awhile back but it went quiet.

    My stm32 powered pi detector by GTdavid

    cheers

    Mdtoday

    Leave a comment:


  • moorejl57
    replied
    Originally posted by Carl-NC View Post
    And this also allows for higher pulse rates.



    An H-bridge driver allows the use of a simple mono coil, but has higher parasitic C so it's tough to get super-fast speeds. I use H-bridge drivers where speed isn't critical.
    What do you think about this en.DM00415791.pdf integrated driver/mosfet bridge for a bipolar setup? It seems reasonable in cost $6 and can be directly driven by a microcontroller 3.3V output.

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    Just checked the gerbers... the dates on the gerbers were 2 days newer than the date on the zip files also the drill files for the TX were 2 days older than the gerber layers. So I just plotted the TX. The I/F board gerbers and drill files matched, but since they were newer than the zip, I re-zipped them. Might want to run a sanity check on them. Can I ask for 2 boards of each... I had promised someone a populated board.
    Thanks JL, I'll do one last check and then if OK , will place an order.
    I'll send 5 of each so you have some extras just in case.

    Thanks for sharing the project.

    Cheers

    Mdtoday

    Leave a comment:


  • KingJL
    replied
    Originally posted by Mdtoday View Post
    ... If your gerbers have not changed since last posting, I will send off later today too, as I have some others to get manufactured...
    Just checked the gerbers... the dates on the gerbers were 2 days newer than the date on the zip files also the drill files for the TX were 2 days older than the gerber layers. So I just plotted the TX. The I/F board gerbers and drill files matched, but since they were newer than the zip, I re-zipped them. Might want to run a sanity check on them. Can I ask for 2 boards of each... I had promised someone a populated board.
    Attached Files

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    If you don't spot something else, I'm getting ready to pull the trigger on sending the gerbers, for both boards, off for fabrication sometime in the next couple weeks.
    I had another look over it last night and could not find anything else, I think it looks OK to me.

    If your gerbers have not changed since last posting, I will send off later today too, as I have some others to get manufactured.

    I will get some extra done and send to you if you like at not cost of course, price is not a whole lot different for 5 or 10

    cheers

    Mdtoday
    Last edited by Mdtoday; 06-03-2019, 11:27 PM. Reason: typo

    Leave a comment:


  • KingJL
    replied
    Originally posted by Mdtoday View Post
    Yes, spotted those after running the sim, thanks for clarifying this.
    If you don't spot something else, I'm getting ready to pull the trigger on sending the gerbers,for both boards, off for fabrication sometime in the next couple weeks.

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    That is the purpose for R1 and R2 on the interface board... to bring the +20V down to 3.3V at pin 15 of the artix-7 cmod board. Then the resistive network on the cmod board brings it down to 1V.


    Yes, spotted those after running the sim, thanks for clarifying this.

    Leave a comment:


  • KingJL
    replied
    Originally posted by Mdtoday View Post
    ... The only other note I made was regarding the Artix-7 analog input range so I ran the Sim again just now checking the final output voltage swing and bias to see if it would exceed the Artix board analog input, it seems to be ok...
    That is the purpose for R1 and R2 on the interface board... to bring the +20V down to 3.3V at pin 15 of the artix-7 cmod board. Then the resistive network on the cmod board brings it down to 1V.

    Leave a comment:


  • Mdtoday
    replied
    Originally posted by KingJL View Post
    Well, I finally got around to verifying that the pulse transformer connections are correct... they are! The pulse transformer windings are in same direction for primary and secondary. so there is a 180 degree phase shift from pin 1 to pin 3.
    [ATTACH=CONFIG]46547[/ATTACH]

    Mdtoday, did you find anything amiss with the boards?
    Excellent... thanks for the info JL

    No, I did make some notes the other day , then got busy with work. The query was around U6 Pin 1 (NC) but I have just looked at the file again this morning and it all looks good JL.

    The only other note I made was regarding the Artix-7 analog input range so I ran the Sim again just now checking the final output voltage swing and bias to see if it would exceed the Artix board analog input, it seems to be ok.

    cheers

    Mdtoday

    Leave a comment:

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