Back to the roots at 50: Introducing Spectral-G4 (AI meets VLF)

[Repwoc]

Have you tried changing the Dead Time in the timer settings ? maybe that would help.

hi Marchel

Thanks. I had tried changing the dead time but it seemed to make little difference. I decided to look more closely. I had set the dead time to 100 nS and verified that there would be no shoot through by oscilloscope, comparing the bridge voltage with the relevant mosfet gate voltage at rising and falling edges..

CH1 (yellow) = bridge (Tx), CH2 (teal) = high-side (p-chan) mosfet gate, CH4 (green) = low-side (n-chan) mosfet gate, CH3 (red) = Rx

With 100 nS dead time:



Clearly there is the expected 100 nS delay between the gate voltage transitions. It could be argued that 100 nS is a little tight as the low-side gate voltage begins to rise before the bridge voltage reaches ground potential, however the high-side mosfet is definitely off before the low-side one comes on.

There is some ringing on the high-side mosfet gate apparent which coincides with the low-side mosfet gate voltage starting to rise.

Note there is noise on the Rx signal when the high-side mosfet gate voltage begins to rise, despite there being no change to the bridge voltage at that point, then again when the low-side mosfet gate voltage rises again when the bridge voltage is relatively stable.

With 300 nS dead time:



Obviously the delay between the mosfet gate transitions has increased to 300 nS. The low-side mosfet gate now transitions well after the bridge voltage reaches ground potential.

The ringing on the high-side mosfet gate is much reduced.although there is still a little overshoot. There is now a dip in the high-side gate voltage coinciding with the low-side gate coming on.

The Rx signal noise is different, but I'm not sure that it has improved or got worse overall.

The sweet spot seems to be at just over 135 nS (23 ticks @ 170 MHz). At that point the low-side gate comes on just as the bridge gets to ground potential. However, given that the bridge voltage is unchanged by switching on the low-side transistor and switching it on is a major source of noise I'm wondering if it would be best left switched off during the half-cycle that the corresponding high-side mosfet is switching.

I can't figure out how merely starting to charge the mosfet gates creates so much noise on the Rx signal.

Dead time = 135 nS:

[Marchel]

hi Marchel

Thanks. I had tried changing the dead time but it seemed to make little difference. I decided to look more closely. I had set the dead time to 100 nS and verified that there would be no shoot through by oscilloscope, comparing the bridge voltage with the relevant mosfet gate voltage at rising and falling edges..

CH1 (yellow) = bridge (Tx), CH2 (teal) = high-side (p-chan) mosfet gate, CH4 (green) = low-side (n-chan) mosfet gate, CH3 (red) = Rx

With 100 nS dead time:



Clearly there is the expected 100 nS delay between the gate voltage transitions. It could be argued that 100 nS is a little tight as the low-side gate voltage begins to rise before the bridge voltage reaches ground potential, however the high-side mosfet is definitely off before the low-side one comes on.

There is some ringing on the high-side mosfet gate apparent which coincides with the low-side mosfet gate voltage starting to rise.

Note there is noise on the Rx signal when the high-side mosfet gate voltage begins to rise, despite there being no change to the bridge voltage at that point, then again when the low-side mosfet gate voltage rises again when the bridge voltage is relatively stable.

With 300 nS dead time:



Obviously the delay between the mosfet gate transitions has increased to 300 nS. The low-side mosfet gate now transitions well after the bridge voltage reaches ground potential.

The ringing on the high-side mosfet gate is much reduced.although there is still a little overshoot. There is now a dip in the high-side gate voltage coinciding with the low-side gate coming on.

The Rx signal noise is different, but I'm not sure that it has improved or got worse overall.

The sweet spot seems to be at just over 135 nS (23 ticks @ 170 MHz). At that point the low-side gate comes on just as the bridge gets to ground potential. However, given that the bridge voltage is unchanged by switching on the low-side transistor and switching it on is a major source of noise I'm wondering if it would be best left switched off during the half-cycle that the corresponding high-side mosfet is switching.

I can't figure out how merely starting to charge the mosfet gates creates so much noise on the Rx signal.

Dead time = 135 nS:

This interference can also be caused by a weak H-Bridge power supply. Try adding a 1-2 Ohm resistor and choke between the power supply and the H-Bridge input and it might help.

[Repwoc]

Besides optimizing the dead time, I would also try:

- Slowing down the MOSFET edges with the gate resistors, and doing it asymmetrically: a larger resistor (e.g. 22 Ω) for turn-ON, with an anti-parallel diode so turn-OFF stays fast. This reduces dV/dt (less coupled noise) without increasing the shoot-through risk.
- An RC snubber across the bridge or the TX coil to damp high-frequency ringing.
- Reviewing the PCB layout and current return paths. Common impedance coupling between the H-bridge and the analog front-end is very often the real culprit with this type of noise.

One more thought that may reframe the problem: since your noise is exactly synchronous with the TX, after synchronous demodulation it does not look like noise at all. It becomes a constant offset vector in I/Q. If it is stable, your nulling / baseline subtraction removes it entirely. What actually hurts you is its jitter (another reason why clean dead-time and stable switching instants matter) and its thermal drift. It also helps to sync the ADC sampling to the TX grid, so the sampling instants never land on the switching edges.

Hi Taktyk

Thanks, all useful ideas.

I have 10 Ω gate resistors currently. I did try higher values (by quite a lot) but it made no difference to the Rx noise and with the larger resistors (100 Ω) the mosfets got quite hot really quickly.

I already tried RC snubbers at each end of the bridge too. No noticeable difference to the Rx noise.

The "PCB" layout is a good point. I'm still experimenting using a solderless breadboard at this point so yes, that could be the culprit. I guess I'll just have to bite the bullet and make some test PCBs.

I get your point regarding the noise being filtered out by demodulation. But these spikes are quite big and I think they would rail the pre-amp.

[Marchel]

Hi Taktyk

Thanks, all useful ideas.

I have 10 Ω gate resistors currently. I did try higher values (by quite a lot) but it made no difference to the Rx noise and with the larger resistors (100 Ω) the mosfets got quite hot really quickly.

I already tried RC snubbers at each end of the bridge too. No noticeable difference to the Rx noise.

The "PCB" layout is a good point. I'm still experimenting using a solderless breadboard at this point so yes, that could be the culprit. I guess I'll just have to bite the bullet and make some test PCBs.

I get your point regarding the noise being filtered out by demodulation. But these spikes are quite big and I think they would rail the pre-amp.

For testing, you can also use this board that I designed, it also contains an H-Bridge.
https://www.geotech1.com/forums/foru...elopment-board