"Beyond" TGSL ....

[Aziz]

Improved version of the synchronous oscillator

http://www.wipo.int/pctdb/images4/PCT-PAGES/2001/152001/01026213/01026213.pdf

Guess, whose invention is it? Same guy.

But this version has a -48 dB noise rejection!!!
Aziz

[Aziz]

Interesting Article

Synchronous oscillator outperforms the PLL

http://www.edn.com/contents/images/46326.pdf

[simonbaker]

This thing oscillates and 'tracks' the RX phase. Your TX ideally has to be within a few Hertz of the RX oscillator .. the RX is now free running and wants to lock to the RX signal so want to lock your TX somehow to the RX oscillator ( but not using phase ) in other words a Frequency Locked Loop would do it ... there actually is such a thing ... most people use phase locked loops though. There would be other ways to do it.
The bandwidth is determined to some extent by the level of the incoming signal.
The frequency is determined by the LC tank.

moodz[ATTACH]13063[/ATTACH]

Interesting -- it seems either LTSpice can't correctly simulate this circuit or perhaps there is a non-linear "limit cycle" at work here. When I subtract the input from the output, it looks like either the phase is oscillating, or the two frequencies are slightly different.

I changed the time step and the oscillation period changes. Must be numerical simulation problems.

-SB

[simonbaker]

This thing oscillates and 'tracks' the RX phase. Your TX ideally has to be within a few Hertz of the RX oscillator .. the RX is now free running and wants to lock to the RX signal so want to lock your TX somehow to the RX oscillator ( but not using phase ) in other words a Frequency Locked Loop would do it ... there actually is such a thing ... most people use phase locked loops though. There would be other ways to do it.
The bandwidth is determined to some extent by the level of the incoming signal.
The frequency is determined by the LC tank.

moodz[ATTACH]13063[/ATTACH]

Hi moodz:

Would you still have a synchronous detector after the "phase amplifier" driven by the TX oscillator? If so, what is the real purpose of the phase amplifier? Or is now the oscillator part of the RX circuit, and you tap off a signal for the TX signal -- which then becomes indirectly the input signal for the "phase amplifier" -- which can shift the RX oscillator -- which controls the TX signal -- my brain is oscillating....

I think I'm not seeing the big picture.

Also, when it "locks onto the input signal", is the oscillator phase exactly the same as the input signal, or is there some lead or lag? And what output would correspond to the phase?

Regards,

-SB

[moodz]

Hi Moodz,



that's really a good idea. Particularly a crystal clocked source reference should make the oscillator pretty perfect.

Aziz

Hi Aziz ... I was thinking how I could lock the tank down with a watch crystal 32.768 Khz.

Oh did I mention this thing will also lock on harmonics and sub harmonics odds and evens .... have not tested fully yet.

So i could TX at 16.384 Khz and lock phase on 32.768 Khz.

Moodz

[moodz]

Now you can analyse it ...

It looks nifty -- but is it not syncronous (not driven by Transmit oscillator)?

What determines it's bandwidth and center frequency if not synchronous?

If that's an LTSpice circuit, would you post it?

-SB

(usual royalty arrangement of course... and don't spend it all in one place)

This thing oscillates and 'tracks' the RX phase. Your TX ideally has to be within a few Hertz of the RX oscillator .. the RX is now free running and wants to lock to the RX signal so want to lock your TX somehow to the RX oscillator ( but not using phase ) in other words a Frequency Locked Loop would do it ... there actually is such a thing ... most people use phase locked loops though. There would be other ways to do it.
The bandwidth is determined to some extent by the level of the incoming signal.
The frequency is determined by the LC tank.

moodzsynchosc001.asc.zip

[Aziz]

Hi Moodz,

Hi Simon .... the front end RX of the TGSL and most detectors of this type use an amplifier and then a PLL or Demod or chopper or something like that to do a phase detect against the TX reference.

Well how about if you turn that around a bit and add a Phase Amplifier ( phaslifier ?? ) ... instead of amplifying amplitude it recovers and lifts phase information from weak noisy signals. ( like in VLFs and two box etc. )

This is a very old idea BTW ... lost in the mists of time ... so I dont exactly claim credit ... however it is one of the most elegant solutions I have seen in analogue signal recovery.

Like most things analogue it has to be used correctly but it requires little or no amplification at the input and will actually lock onto signals that are 40 db below the noise .. and its not a PLL ... cos PLLs cant do that.

It has a very narrow bandwidth ... however we want it for phase recovery so that is actually a bonus so it wont lock onto noise.

Variations of it are referred to very occasionally in the literature as a 'synchronous' oscillator.

Simple ... cheap and elegant ... here it is .... ENJOY ... ( and dont forget to mention me in the patent )

[ATTACH]13061[/ATTACH]

that's really a good idea. Particularly a crystal clocked source reference should make the oscillator pretty perfect.

Aziz

[simonbaker]

Hi Simon .... the front end RX of the TGSL and most detectors of this type use an amplifier and then a PLL or Demod or chopper or something like that to do a phase detect against the TX reference.

Well how about if you turn that around a bit and add a Phase Amplifier ( phaslifier ?? ) ... instead of amplifying amplitude it recovers and lifts phase information from weak noisy signals. ( like in VLFs and two box etc. )

This is a very old idea BTW ... lost in the mists of time ... so I dont exactly claim credit ... however it is one of the most elegant solutions I have seen in analogue signal recovery.

Like most things analogue it has to be used correctly but it requires little or no amplification at the input and will actually lock onto signals that are 40 db below the noise .. and its not a PLL ... cos PLLs cant do that.

It has a very narrow bandwidth ... however we want it for phase recovery so that is actually a bonus so it wont lock onto noise.

Variations of it are referred to very occasionally in the literature as a 'synchronous' oscillator.

Simple ... cheap and elegant ... here it is .... ENJOY ... ( and dont forget to mention me in the patent )

[ATTACH]13061[/ATTACH]

It looks nifty -- but is it not syncronous (not driven by Transmit oscillator)?

What determines it's bandwidth and center frequency if not synchronous?

If that's an LTSpice circuit, would you post it?

-SB

(usual royalty arrangement of course... and don't spend it all in one place)

[moodz]

Well Analyse This

Hi Simon .... the front end RX of the TGSL and most detectors of this type use an amplifier and then a PLL or Demod or chopper or something like that to do a phase detect against the TX reference.

Well how about if you turn that around a bit and add a Phase Amplifier ( phaslifier ?? ) ... instead of amplifying amplitude it recovers and lifts phase information from weak noisy signals. ( like in VLFs and two box etc. )

This is a very old idea BTW ... lost in the mists of time ... so I dont exactly claim credit ... however it is one of the most elegant solutions I have seen in analogue signal recovery.

Like most things analogue it has to be used correctly but it requires little or no amplification at the input and will actually lock onto signals that are 40 db below the noise .. and its not a PLL ... cos PLLs cant do that.

It has a very narrow bandwidth ... however we want it for phase recovery so that is actually a bonus so it wont lock onto noise.

Variations of it are referred to very occasionally in the literature as a 'synchronous' oscillator.

Simple ... cheap and elegant ... here it is .... ENJOY ... ( and dont forget to mention me in the patent )

[simonbaker]

Simon ... I rebuilt the front end of the TGSL and what do you know ... you can make an old dog do new tricks ( or add another wheel ? ).
The circuit should even be good for two box as the phase recovery sensitivity seems to be pretty good now. ( better than 130 ... 160 db ?? )
To me ... the need to recover accurate phase information out of very noisy and weak signals seems to be the main problem with the current set up and this problem ( ie phase recovery of the rx signal ) limits depth.
I am still poking around the circuit to see what else it will do ... but below is a plot of a perfect phase recovery of a noisy and weak target signal that is 0.1uv peak to peak sitting on 5 volts of hum. ( actually its a plot of input current vs phase output ) but it is a 0.1 uv signal going in. Even I was impressed by that. The input is impedance matched but not differential. I am going to add a buffer amp though to see what happens.
It is running at 7.1 Khz ... just happened the caps and coils fell out that way.

PS it is all analogue ... not an FPGA in sight.


Aziz ... you are going to run into a problem that will be a fundamental limitation on the performance of your design. Basically the ADC chip in your laptop is clocked off its own crystal. The signals you are analysing are not related to this clock ... this will present a fundamental and irremovable obstacle when you are trying to lower the noise floor on weak and noisy signals particularly with regard to phase. The amplitude is not so critical. This limitation was the fundamental reason I went over to FPGAs as all the DACs and ADC sampling and generation processes are locked to the same time reference as the signals being analysed. It also allows you to use aliasing ... which we dont normally want ...to great advantage and removes the requirement for quadrature signals. For those who dont understand this ... it is kind of the same reason we use synchronous power supplies in PI front ends. Without synchronous conversions you will be able to make a great detector ... but not a superb detector.

[ATTACH]13058[/ATTACH]

I'm/we're interested as usual!

I have not thought the TGSL Synchronous Detector to be that deficient, other than it throws away 1/2 of the signal. But otherwise, it seems to me pretty well designed for picking small signals out of noise.

There is no "arithmetic" for separately deriving phase and amplitude information, so it uses a separate "Ground Balance" channel to ignore pure amplitude changes in the received signal. I believe it is possible therefore for "ground noise" to obscure a good signal on occasions.

Anyway, tell us more about your improvements. Seems like Monk's thread is indeed breathing some new life into these projects.

-SB

[Aziz]

Now it makes sense to look for a low noise amplifier.

If I feed a variable reference into the sound card directly (via pot), the phase noise is radically reduced (+/- 0.00002 degree at full input and +/- 0.01 degree at minimum input).

The front-end amplifier is quite noisy. Anyway, I will use the current amplifier further.

Aziz

[Aziz]

Phase Noise Measurement

Well,

it just took a few minutes to implement the phase noise test procedure (including generating quadrature-phase reference ). I am now locked onto the external LC oscillator but not locked in the jail yet (could happen).

On ultra tiny signals (almost 0 V, can't reduce the tiny signal anymore, the 10 turn pot is at its minimum), the phase noise is +/- 0.16 degree.
On small signals, the phase noise is +/- 0.01 degree.
On large signals, the phase noise is better than +/- 0.008 degree.

Now we can see, that some residual voltage in the RX coil is important to have a better phase stability (low phase noise).

Not a large time constant is used for the lock-in amplifier at the moment.

This should be good enough I think. The digital lock-in amplifier can lock onto the external LC oscillator. There are no problems in sight yet.

Cheers,

Aziz

[Aziz]

Hi Moodz,

no, I won't do it. I might have some aliasing problems but the noise from the front-end should be much higher.

I am using the reference clock from the oscillator this time. Any clock instability in the ADC will cause some additional noise but this should be really very low (crystal clocked).

A quick test with the internal generated reference and tuned LC oscillator (to have almost same clock) shows me, there won't be much problems. I hope to present some results in the coming days.

Aziz

[moodz]

Simon ... I rebuilt the front end of the TGSL and what do you know ... you can make an old dog do new tricks ( or add another wheel ? ).
The circuit should even be good for two box as the phase recovery sensitivity seems to be pretty good now. ( better than 130 ... 160 db ?? )
To me ... the need to recover accurate phase information out of very noisy and weak signals seems to be the main problem with the current set up and this problem ( ie phase recovery of the rx signal ) limits depth.
I am still poking around the circuit to see what else it will do ... but below is a plot of a perfect phase recovery of a noisy and weak target signal that is 0.1uv peak to peak sitting on 5 volts of hum. ( actually its a plot of input current vs phase output ) but it is a 0.1 uv signal going in. Even I was impressed by that. The input is impedance matched but not differential. I am going to add a buffer amp though to see what happens.
It is running at 7.1 Khz ... just happened the caps and coils fell out that way.

PS it is all analogue ... not an FPGA in sight.


Aziz ... you are going to run into a problem that will be a fundamental limitation on the performance of your design. Basically the ADC chip in your laptop is clocked off its own crystal. The signals you are analysing are not related to this clock ... this will present a fundamental and irremovable obstacle when you are trying to lower the noise floor on weak and noisy signals particularly with regard to phase. The amplitude is not so critical. This limitation was the fundamental reason I went over to FPGAs as all the DACs and ADC sampling and generation processes are locked to the same time reference as the signals being analysed. It also allows you to use aliasing ... which we dont normally want ...to great advantage and removes the requirement for quadrature signals. For those who dont understand this ... it is kind of the same reason we use synchronous power supplies in PI front ends. Without synchronous conversions you will be able to make a great detector ... but not a superb detector.

[Aziz]

Signal Amplifier Modification

Hi,

the signal amplifier should be converted into an AC amplifier (high pass filter + amplifier). Remove the grounding of the resistor R2 and put a series capacitor (100nF) to R2 and ground it. This should avoid amplifier saturation on high gains and high op-amp offset voltage errors.

The correct capacitor depends on the gain and frequency response of the amplifier (high pass corner frequency should be quite high to suppress low frequency power line EMI).

Corner frequency fc (3 dB mark):
fc = 1/(2*PI*(R1+R2)*C)
R1,R2 determines gain of the amplifier. R1+R2 should be >= 5k

Aziz