FPGA based UNIPI system

[Olly]

Looks like a nice chip ... the AD7760 is strange ... the Eval board all built up and tested is only a few dollars more than the one off chip price ??? Be interesting to see what you can make of the AK5578.
I was tempted to move away from the FPGA to a CPU ... but will stick with the FPGA now as it can deal better with weird timing issues that seem to crop up with the ADCs. Besides the FPGA makes for a nice multichannel realtime builtin oscillscope and logic probe which is invaluable for debugging the DSP and ADC logic. I am ordering some FPGA boards from china to replace my obsolete boards but the VHDL code will be the same.
If you are making a board for the AK5578 then I would also be interested as the 2.5 MSPS that the AS7760 offers is nice ... but prob not necessary.

moodz.

Progress on the AKM board. Not fully routed yet, but you get the idea.
I've used the Raspberry Pi Pico 2 as the controller and this also provides pulses and timing for my TX board.
The board is 100mm x 100mm and as you can see most of it is taken up by the 8 analogue input channels.

Once I evaluate it and see whether there really is a 9dB improvement in the noise floor when using all 8 in parallel, I may use the 2 or 4 channel device which is a bit cheaper and will reduce my real estate accordingly. It's all a trade-off; More space and cost for better noise specs.



Cheers,
Olly

[moodz]

Progress on the AKM board. Not fully routed yet, but you get the idea.
I've used the Raspberry Pi Pico 2 as the controller and this also provides pulses and timing for my TX board.
The board is 100mm x 100mm and as you can see most of it is taken up by the 8 analogue input channels.

Once I evaluate it and see whether there really is a 9dB improvement in the noise floor when using all 8 in parallel, I may use the 2 or 4 channel device which is a bit cheaper and will reduce my real estate accordingly. It's all a trade-off; More space and cost for better noise specs.



Cheers,
Olly

That looks very cool. Going back over the scheme I am using there is no need to use an FPGA or costly ADC. Although as you say there is a tradeoff.

[moodz]

In the mean time I have ported the all the code from spartan 3 to spartan 6 ( which was mostly just re-mapping ports ) Although I did convert everything to signed math from bit of a mish mash that was there before.
I also added more traces to the onboard VGA "virtual oscilloscope" for signal inspection.

Here is a short video showing the full depth discrimination in air of the new code.
Basically there is a target amplitude ( ferrous non - ferrous ) that will be indicated by polarity of the target amplitude.
I dont do VDI ... I only do GOLD ... NOT GOLD
Auto ground balance is still working ... added a rotary control to fine tune the final result.

The sensitivity is on par with a PI detector ... but is more noise resistant than a PI. ( and it can discriminate )

So single frequency detectors with full discrimination depth and PI type sensitivity are possible .....

... and next I start on multifrequency. ( is it worth it ?? )

https://www.youtube.com/watch?v=lmAqRtBEq34&t=23s