Detection distance for a US nickel and quarter

[dbanner]

There is no issue with the rise time of the gate drive pulse. So Vgs pinch off and on resistance are the parameters for matching. I saw on Cscope schematic that FETs should be matched to within +/- 0.25V pinch off. FETs with close Vgs off having similar on resistance, well you could measure that by monitoring the Idss.

[dbanner]

What I measure is VGS(off) which is the gate source cutoff voltage. This appears to have a direct relationship to the drain source on resistance, which is what we are really interested in. So if we have two devices which have the same VGS(off) then the on resistance should be a reasonable match. The National data book I have only gives a maximum value for rDS (on) of 100 ohms. No minimum or typical. Data gives VGS(off) as between -0.5V and -3V. I have just measured one of my J113's and got a reading of -2.6V.

Eric.

Eric, what is your opinion on pulling the line to ground during the off cycle by using a second jfet driven by the inverse pulse . Nonsense or is there another reason why this should'nt be done.

[green]

Eric, what is your opinion on pulling the line to ground during the off cycle by using a second jfet driven by the inverse pulse . Nonsense or is there another reason why this should'nt be done.

Is there a reason it should be done?

[dbanner]

Is there a reason it should be done?

Clean switch off, no leakage. Not sure at these switching rates, just curious to know if there was any benefit to be had. Perhaps it obviates the need for matching pairs also, since the line is pulled to ground at the instant of the pulse step. Don't know, just speculation, ideas.

[Ferric Toes]

Hello Eric, thanks for the reply, thats an interesting approach using VGS(off), most of the testers I have seen used IDSS for matching, I have a digital transistor tester and looking at the display it gives three readings, one is Zero current @ XX volts, one j113 tests at 2.7 volts so I guess that is VGS off, I dont have a handbook for it.
But IDSS is all over the place.
I will build this manual simple tester , I think it will give a better indication of VGS, we are getting down to zero temperatures over night now , hard to get into work shop

A simple test is to use a a bench test meter set to a range of 0 - 200ohms. short the gate to the source and take to the -ve probe, and connect the drain to the positive probe. I checked what the voltage was between probes on the 200ohm range and it was 300mV. Data states that the conditions for measuring rDS(on) are = or < than 100mV. However, 300mV is not too far removed, so I was happy with that. I then selected two J113's that measured 2.05V VGS(off) and measured the resistance on the testmeter. One was 53ohms and the other 54ohms. This is a good enough match considering that the jfet has a resistor in series with the drain, usually of a few kilohms. Latterly, I have used a NPD5566 which is a dual matched J113. Hard to get nowadays though.

Eric.

[6666]

A simple test is to use a a bench test meter set to a range of 0 - 200ohms. short the gate to the source and take to the -ve probe, and connect the drain to the positive probe. I checked what the voltage was between probes on the 200ohm range and it was 300mV. Data states that the conditions for measuring rDS(on) are = or < than 100mV. However, 300mV is not too far removed, so I was happy with that. I then selected two J113's that measured 2.05V VGS(off) and measured the resistance on the testmeter. One was 53ohms and the other 54ohms. This is a good enough match considering that the jfet has a resistor in series with the drain, usually of a few kilohms. Latterly, I have used a NPD5566 which is a dual matched J113. Hard to get nowadays though.

Eric.

Thanks Eric I have tried your method and it works nicely, I should be able to rip through my bag of 50 J113's cheers

[6666]

There is no issue with the rise time of the gate drive pulse. So Vgs pinch off and on resistance are the parameters for matching. I saw on Cscope schematic that FETs should be matched to within +/- 0.25V pinch off. FETs with close Vgs off having similar on resistance, well you could measure that by monitoring the Idss.

Thanks will check as well

[Ferric Toes]

For the record, here is the schematic for the FET tester that I have used since the 1970's. vis the 741. Now, I would just use the 200ohm range on the multimeter with a fixture to plug in the jfet and which shorts the S to G. J112's also work fine and give a lower rDS(on). VGS(off) is a bit higher though, with a max value of -5V, but most read about -3V.



Eric.

[6666]

Thanks for that circuit Eric

Well this has been an interesting exercise.

I have tested 55 J113 jfets, not are all equal.
I tested them all for VGS(off),

Out of the 55, there were enough to group into some pairs and quads with matching VGS(off).
The VGS(off) varies between the pairs and quads groups, the lowest VGS(off) is 1.1 volts, the highest 2.7 volts

For the record the groups VGS(off) are 1.1-1.2-1.5-2.6-2.7 volts

Question now is - is it better to use the lowest or highest VGS(off), or doesn't it matter as long as they match ?

[surfdetector]

Thanks for that circuit Eric

Well this has been an interesting exercise.

I have tested 55 J113 jfets, not are all equal.
I tested them all for VGS(off),

Out of the 55, there were enough to group into some pairs and quads with matching VGS(off).
The VGS(off) varies between the pairs and quads groups, the lowest VGS(off) is 1.1 volts, the highest 2.7 volts

For the record the groups VGS(off) are 1.1-1.2-1.5-2.6-2.7 volts

Question now is - is it better to use the lowest or highest VGS(off), or doesn't it matter as long as they match ?

At least your results are well within the specs shown on the datasheet of -.5 min to -3 max.

[6666]

After a bit more testing it looks like the jfets with the higher turn off voltage , have a higher IDSS, might try them first

[Ferric Toes]

After a bit more testing it looks like the jfets with the higher turn off voltage , have a higher IDSS, might try them first

Yes, that is correct. J111 and J112 have higher turn off voltages and higher IDSS. On resistance is lower too. See data sheet.

Eric.

[6666]

Yes, that is correct. J111 and J112 have higher turn off voltages and higher IDSS. On resistance is lower too. See data sheet. [ATTACH]50493[/ATTACH]

Eric.

Thanks Eric

[6666]

Yes, that is correct. J111 and J112 have higher turn off voltages and higher IDSS. On resistance is lower too. See data sheet. Scan_20200608.jpg

What I actually meant was the higher the VGSoff is amongst my collection of J113 fets
is the higher the IDss of those fets

[Ferric Toes]

What I actually meant was the higher the VGSoff is amongst my collection of J113 fets
is the higher the IDss of those fets

From my limited knowledge of semiconductor production techniques I would think that J111, J112 and J113 are all made as one batch and then sorted according to their electrical characteristics i.e.VGS(off), IDSS etc. The fact that they are all 'Process 51' supports this. Higher VGS(off) in a J113 results in a lower RGS(on) and hence a higher drain current; although this is a pulse measurement as per note 2 on the data sheet. This follows through to the J112 and J111. However, J110 is a different process and on a different page in the data book. Many of the characteristics are similar to the J113 but it does not work without modification to the source circuitry. It is 'Process 58' and encompasses J108, J109 and J110.

Yes, I have just noticed that toward the front of the data book, the various processes are listed, together with the die construction. The dies for Processes 51 and 58 are quite different

Eric.