Detection distance for a US nickel and quarter

[green]

Hi Green, I went back to the instrument I made to do soil measurements, and which I used to measure the decay for nickels, quarters etc in this thread. The sample and integrator is the same arrangement as in my post 55 except that the 560k resistor is replaced by a push switch to manually zero the circuit between each reading. This removes any non-linear offset in the baseline. The output is displayed on a LCD voltmeter module scaled such that 1999mV is the max reading. I can take readings at suitable intervals down the decay curve and then plot it in linear or log. With this unit I can increase the sample pulse width to a maximum of 400uS and the noise level does not change. The sensor used is a small rectangular fig.8 coil inside a box with an internal and grounded graphite shield, so the dominant noise is circuit noise rather than pickup on the sensor. Noise level on the display is + or - 1mV. The reason the noise level does not change is that there is a constant ratio between sample width (on time) and off time before the next TX pulse. e.g. if the sample width is 10uS and the time to the start of the next TX pulse is 100uS, then for 100uS sample width the time to the next TX would be 1000uS. Whatever the sample width, this ratio results in the same integrator time constant and response speed. Of course it doesn't have to be 10:1, could be 15 or 20:1.

The best TX width from my tests is 350uS for a quarter and sampling early gives extra signal from skin depth currents added to the final single exponential. 150 - 200uS sample width is recommended for best range on a quarter. The range on a nickel should still be at least as good as with a short sample pulse. If two samples are taken for EF cancellation the width should also be the same as the first sample. The inter-sample pulse time should also follow the same ratio. All of this will most likely result in the pulse repetition rate having to be reduced to provide enough time for one complete TX and RX pulse train.

More later,

Eric.

Hi Eric, Makes sense with noise. Integrator gain stays the same, noise should stay the same or maybe be less noise with longer sample. Not clear with the quarter. https://www.geotech1.com/forums/attachment.phpattachmentid=50311&d=1590168202 the chart I did with Excel shows the average for the quarter is less with longer sample time if gain stays the same. Maybe I'm misunderstanding what your saying or I'm doing something wrong.

[Ferric Toes]

Hello Eric what components are between the pre amp out and the fets , is it just a resistor, and what dc voltage did you set for the pre amp out ? thanks

Here is the preamp stage that drives the gates. The first stage is a 5534 with a gain of 10, although other devices can be as good or better. Cross coupled inverter has gain of 50 (the two gates are shown).
Offset adjustment on first stage sets the the inverter stage outputs to zero. 5532 IC is used for this stage, although other duals can be used.



Eric.

[6666]

Thanks for the circuit Eric, trying to learn what I can about nfet switch's as used in PI. and getting them biased correctly.

[Ferric Toes]

Thanks for the circuit Eric, trying to learn what I can about nfet switch's as used in PI. and getting them biased correctly.

For many years now I generally use Cmos bilateral switches and not nfets. However for the posted designs in this thread, I have been using an old board for experimenting, which had nfets mounted. The pulse generator driving the nfets swings from -5V to 0V. With -5V on the gate with respect to source holds the nfet off, and 0V with respect to source turns it on. J112 and J113 work fine. It is a good idea to limit the negative swing on the preamp output with four diodes in series/parallel, type 1N4148, otherwise if the preamp swings to -5V then the nfet will turn on when it is not wanted. In the circuit I posted, the diodes are connected across the 50K resistor as per the attached picture

Eric

[waltr]

Eric,
Are you sure that schematic is correct?
I tried it in LTSpice and the outputs of both op-amps went to their rails.

I think the 1k resistor from U10a's output should go to U10a's inverting input not the non-inverting.

Making this change in LTSpice gave 50x gain and 180? phase between the two outputs.

[Carl-NC]

I think the 1k resistor from U10a's output should go to U10a's inverting input not the non-inverting.

My conclusion as well.

[green]

Wondered why 6 resistors instead of 4 resistors. Think I've seen explanation somewhere but don't remember why. Did a spice simulation. At lower frequency both the same, peaks at 1V. Wasn't expecting gain to increase at 1MHz for the four resistor. What are the advantages or disadvantages for each amplifier?

[Skippy]

Each of the amplifiers has the same basic circuit around it, an amplification of +2 ( ie. an inverting amp with gain = -1 ). So dynamically, they will behave the same, any issues like the effect of gain-bandwidth product will affect them equally, likewise they see ( almost) the same load on their output pin, so they will have the same issues regarding gain, phase shifts etc. That means the two complementary outputs will be good inverses .. no different lags, overshoots, settling errors etc.
I think to get the same source resistance to both + and - opamp inputs ( for bias current correction ), the resistors R1, R4, R5, R6 should be 2K0. Then both inputs on both opamps will see 1K0 resistance.
Technically, I think U1 needs a 50K load to 0V ground, so it matches that seen by U2.

[green]

Used a sinewave to compare methods reply #67. Should have used a step. Added C1 across 50k left amplifier to adjust response. Both amplifiers take about the same time to settle to correct value(1.3us). I'm guessing the idea is to have the normal and inverted output have the same response so EF cancels. Signal has settled when EF sample is taken for both amplifiers. If target sample is taken to soon both amplifiers have an error. Not seeing an advantage to either amplifier. Not much difference in normal and invert out with either amplifier. What am I missing? Maybe spice simulation doesn't compare well with real circuit?

Left amplifier: offset on top amplifier multiplied by 50, offset on bottom amplifier multiplied by 1. Right amplifier: offset on top or bottom amplifier multiplied by 50. Advantage for either right or left amplifier?

[green]

Left amplifier: offset on top amplifier multiplied by 50, offset on bottom amplifier multiplied by 1. Right amplifier: offset on top or bottom amplifier multiplied by 50. Advantage for either right or left amplifier? Not correct

[Ferric Toes]

Yes, I did make a mistake in the schematic. The boards on which I have used this system all work fine, so the connections there were obviously correct. This idea was based on a 'single ended differential line driver' given as one application in the AD8056 data sheet. I have also seen this arrangement as a phase splitter in audio power amplifiers. A similar result can be made by following the first preamp with an inverter IC. Which is best, I don't know. I assumed the former would be, because of its balanced configuration, which is important in audio.

Eric.

[waltr]

Thanks for posting the source of this circuit.
The AD8056 data sheet gives an explanation.

[Skippy]

Thanks for the source reference, Eric.
Here is the pdf datasheet for the AD8056 from AD's website:
https://www.analog.com/media/en/tech...D8055_8056.pdf
and from Farnell Electronics site:
http://www.farnell.com/datasheets/92690.pdf

And the pertinent part clipped out as jpg images:

[liudengyuan]

Thanks for the source reference, Eric.
Here is the pdf datasheet for the AD8056 from AD's website:
https://www.analog.com/media/en/tech...D8055_8056.pdf
and from Farnell Electronics site:
http://www.farnell.com/datasheets/92690.pdf

And the pertinent part clipped out as jpg images:

How do you generate positive and negative power?

[Carl-NC]

How do you generate positive and negative power?

You can either use a charge pump to generate it, or use a positive-only supply with a rail splitter to create a midpoint "analog ground." Both methods are widely used in forum projects.