LOOKING FOR GOLDSCAN 4 Schematic.

[sisco]

Hi all

have somebody GOLDSCAN4 PCB layout with standard parts (not use SMD

parts like GS-4 pdf file)

[QUOTE=Chris2;49218]Hi 1843,

be patient....drawing a proper schematic in a CAD program is the first step in making PCB's. Chris [/QU
I NEED PCB FOR GOLD SCAN 4

[Reg]

There is another error on the schematic and that is located at the input to the preamp which is now a NE5534 (was a LM709 on the earlier schematics). The two diodes connected to pin 2 are shown as a parallel set. One of the diodes needs to be reversed. In other words, the input pin of the op amp will connect to the cathode of one diode and the anode of the other. This will allow the diodes to limit both positive and negative voltages.

Reg

[1843]

Hi 1843,

be patient....drawing a proper schematic in a CAD program is the first step in making PCB's. Chris

Hi chris,
one side pcb is good!

[Chris2]

Gold Scan IV

Hi 1843,

be patient....drawing a proper schematic in a CAD program is the first step in making PCB's. Chris

[1843]

Gold Scan IV

Hi Alexismex,
Why do you miss your time by drawing the schematic? It is not important...
Please design a one side PCB for it, It is very very neseccary!

Best regards

[Alexismex]

verif

hello 315,
I check quickly the schematic , my two errors are corriged :
- pot SENS is now ok and q9 and q10 go to the ground ...

The big FORGET it is the tank condensator 3300uF connected between r11+r12+source of q4 ...to the ground ...OK, please make the change in schematic.
it is very important to have this condensator .
For the 5534 (work very well also), but i have another configuration WITHOUT the cond.of 10pf ...
Now i do not much time but i promess to publish the photos of my copy of the original boards exactly like i see them.
Have a good day
Alexis.

[kt315]

hi All. again and again, people worry that the topic may be get out! and get out at the bottom! GOLDSCAN-IV!... I attach new one here I got from camraden. I VERY hope you are ready to help us to verify and to fix it up.

all the Best.

[Cadophobic]

retraction

Let me pour some more gasoline on my argument about why Alexis' reverse engineered drawing won't work.

I believe the CD4098 device is -essentially- the same as a CD4538. A datasheet available from
http://www.st.com/stonline/products/...re/ds/2071.pdf describes a non-retriggerable mode for the device, where, (Q) and (+in) should be connected together if negative edge triggering.

This would account for the configuration of TC4538-C and D.

(Looks like I get a full plate of crow today.)
However, National suggests grounding pins 1 and 15 to pin 8 (big deal).
Cadophobic

[Cadophobic]

Made a mess

Alexis (and Everybody):
I have decided that the that the 4538 spice "model" that I used is definately inaccurate. I took issue with the Goldscan IV circuit showing two instances of where an OR gate's (+) inputs would be held high, and wondered about how the associated outputs could ever change in that configuration. And, while I still wonder about that, I can see that the so called "fix" that I offered has, apparently, no less than seven (7) counts of the exact same offense. I had doctored the CD4538's diagram without fixing any problem with the actual model or even attempting to understand its sublties.
Do not trust my timing diagram. The IC model was probably derived for a 74123, although the circuit diagram does not match. I need more time to sort this out.
Whhooee, what a mess.
Back to the drawing board for me! I may come back if and when I ever sort this discrepancy, but meanwhile you can color me red! I will attempt to correlate my theory against real-life, in the meantime. (Eerch).


Sorry about any confusion I have caused.

Goldscan4

Hello, I understand your frustation , first for me I have this doubt also , i check the original board many times to see if the pin 1 and 15 of "D" does connect to the pin 1 and 15 of "C" but it do not physically 100% shure of that...
I say ok , but i will remember this bug when i check my board specialty the timing circuit with my scope ...when i finish my first printing board i doble check it and with some minor adjustment all the circuit did work like the original ,same range detection etc...
I also connect and disconnect the "BUG" nothing happen in the scope , like I say????????????????,same timing sequence etc...
For me it will be easy because i can check all the originals signals from the original GS4 because I have it and i compare with my signals of my board also , i make the same coil with very near the same inductance and resistance ...It is for that reason that i tell you that , yes i pass many many hours to reverse , because of the doble board etc..and also without destroy the original (it still working...) Sometimes you don't understand something in electronic design but it work ....Like i said before, to convince you, it is better to take a proto board and make only the timing seccion and you will see the four beauty signals(15uS) at pin 6 and 10 of "D" and at pin 6 and 10 of "C" and their sequence; I note them with TEST.
You will need 555, and four 4538
Resistors( for 555): 10R ; 6K8 ; 47K ; pot frequency 10K
condensator(for 555): 47N ; 22uF
NOT to much with this you have a pulse from 450-550PPS...
NEXT for the 4538'S :
resistors: 10R;5K6;27K;39K;120K;120K;8K2;1K2; trim:10K;Pot delay:50K
Condensator:22uF;1500pF (X5); Diodes:1N914(X4)

IN TOTAl ONLY 11 resistances, 8 condensators; Two pots, one Trimmer and 4 diodes ;one protoboard and one hour of work...Remenber the GND of the GS$4 it's connect to the POSITIVE of your alim (see schematic)...
I do not ask you to much time and money to check this , OK....
And if you continue your effort you put a IRF 740 ;a 2N3906 and a Op 709 o another, a coil, and you have your front end set up.........

The only error you will have in the schematic it is : put the drain of the two J113 to GND (1/4 IC2 ) like they say in the forum and open the connection of POT SENS in IC3..... the second error is not too much and easy to see but the first error was too bad and the detector do not work ...my apology for that ....all the schematic is the same like original....
Have a good night,
Alexis.

[Cadophobic]

dual channel timing circuit, CD4538

I would love sucking in some solder fumes, lead and all, but I don't have a facility to hard-wire circuitry as much as I'd like to. But there's the beauty of SPICE, it helps prevent our falling victim to subtle errors of logic - which brings me to my point: I stand by the relevance and accuracy of my previous post.

In the reverse engineered schematic drawing of the Goldscan, there appear to be errors in the timing circuit. Refer to the attached image. I won't say exactly what CD4538 datasheet that I clipped, because Fairchild might come after me. I already have enough legal problems without begging for more. But it should be obvious that, if CD4538 pins 4 and 6 are connected, after the Q output (pin 6) assumes a logic one state, it will stay there. My SPICE model may not be entirely accurate, but please do not expect me to ignore the datasheet.

Toggle the input on pin 5 until the cows come home, but Q should not change state because, having put logic 1 on the or gate positive logic input, the output will continually be forced high. A latch-up happens. I don't even have to melt solder to know that. It's a natural fact. If not, then I am in the wrong line of work (which could explain why I don't have a job!) I do not have a Goldscan IV, and even if I did, I doubt that I would have the energy or the resolve to extract a schematic by analyzing the circuit board. And so, I credit you for your accomplishment by reverse engineering the schematic.

However, can the timing circuit, as it is drawn, be logically rationalized? No. When you built your functioning units, did you go by the schematic drawing as presented here?? I wish the rest of the circuitry was as simple to analyse as the timer, because I am also having a problem with the sample and hold. It's principle has thus far escaped me. I am not a SPICE expert, nor an engineer. Just a wannabe, and thus far I can't rationalize the S/H, although I will continue to try.

By the way, I grabbed the CD4538 spice model from LTspice user's group at http://groups.yahoo.com/group/LTspice.
I made a minor modification to the available part drawing, but in no way did I modify the model file. I am not so brave.

Anyway, have a nice day, Y'all. You don't have to believe the rantings of a fifty-something year old wannabe, but you should believe the datasheet.

Gldscan schematic

Hello forum, I am who make the reverse schematic of the Goldscan many years ago , don' t waste your time to tell us it's not working because the complete seccion of timing is 100% OKKKK, for you it is much better to take your solder pen with fumes of flux (better that playing with spice) and realize the complete Goldscan4 and you would see for yourself it work perfectly....please do not spread doubt for the people who want to construct the GS4, it is a very, very good pulse detector with a beautiful engineering design (thanks a gran part to Eric)...I have realize at this time many version of GS with different variation design (audio, autotrack,etc...) but the main seccion for exemple the timing are still not changed ....Very soon I will have a web site with all the infos about and the printed circuit in semi-kit ...
have a good time and goods constructives researchs all guys of the forum.
I do not write many time in the forum because in this moment i am very busy in working.
Alexis.

[Cadophobic]

circuit update

If all goes well there are graphics of the timing circuit as I have developed through process of elimination. I have no access to the original Goldscan_IV except through what's provided by previous posts. I am open to criticism or advice on the accuracy of this post.

[Cadophobic]

timing error

I had been planning to put together a MD, and I worked on the Magnum IB for a long time - but I am taking (Darth Carl's ?) advice to do a PI first, mainly because a GOOD coil for an IB is a daunting endeavor. Sooo I like this particular project because I want to find gold. But it looks to me like the reverse-engineered timer circuitry has problems.

For one, a CD4538 device needs grounds on pins 1 and 15. CD4538 timer grounds are not supplied internally , unlike their TTL counterpart 74x123?). ( For that matter, I don't know why those pins arent named GndA and GndB instead of the usual CxA and CxB, or something-or-other.) I may be wrong on this point, haven't breadboarded, and in fact similation using (the only model I have available) (and) LTspice seems to work whether or not I add an explicit ground on those two pins!
Of course the model I use is only a spice MODEL and until any circuit is hard-wired (and tested) there can be no knowing for sure.

On another note, look at -any- CD4538 datasheet. You can verify that so long as the +in pin of the device is tied to the Q output while it is in a positive state, the output logic output level can never change, no matter how many times the (-) input is toggled. !! The TC4538 #C, and TC4538#D " are wired in that fashion, according to the schematic. That must be incorrect.

Anybody buying into this conundrum?

download SwitcherCad (aka) LTspice from http://www.linear.com/company/software.jsp

I've had enough for today..
bye