PICKINI V4 - an easy to build, self adjusting PI detector

[BC547]

New free web space found:

http://www.projects.byethost31.com/MD/pickini_en/V4/intro.html

[dbanner]

@Boadil
Glad you still like it 10 years later.
You could still improve it:
- adapt the main slicing level of the comparator with an an analog ground sample to introduce some sort of automatic GEB
- port it to a newer Microchip microcontroller
- preferably one with an internal clock speed higher than 32 MHz = more resolution to measure the pulse width
- port the code to the Microchip IDE instead of the MikroC environment I used at the time
- draw a new PCB with Kicad or some other up to date tool
- possibly introduce 2 different slicing levels for the comparator to get some idea of the slope and possibly some sort of rudimentary discrimination based on conductivity

I tried porting the Pickini4 code to an Arduino Nano once, but it lacked all sorts of nice features that were present in the 16F1824: speed, lack of comparator hysteresis, ADC resolution and speed, ...

Feel free to give this project a new life - or temporal sampling in general.

Best regards from Belgium,
- Bernard

Hello Bernard,
What is your opinion on using (temporal sampling) the Microchip(specifically the PIC18F16Q41) with a bi-polar (H-drive)TX and this RX front end:




A microcontroller's internal hardware comparators can only handle positive voltages relative to common ground (0V to (VDD). we will now tap into both internal comparators simultaneously (Comparator 1 for VOP and Comparator 2 for VON) to process the dual-polarity decay tails natively. Maybe more can be done with this in the software.

1. During a Positive Pulse Cycle: The coil discharges a standard positive flyback decay tail. Your differential receiver stage processes this, and the signal appears as a positive-going voltage decay curve on the VOP line.
2. During a Negative Pulse Cycle: The coil collapses in the opposite polarity, creating a negative-going flyback tail. Instead of forcing the microchip to read a negative voltage, your inverter/differential amplifier stage flips this inverted signal upside down, outputting it as a clean, positive-going decay tail on the VON line.

Also to implement some sort of automatic GEB. Or ground substraction.

Of course I know this will be on a different thread.

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[BC547]

With the PIC18F16Q41 you have a clock speed of 64 MHz = timer resolution of 16 ns. Which doubles the resolution of Pickini V4
You can gate TMR1 with the comparator outputs.
The comparators should have hysteresis.

Looks very promising.
If I had time I would redesign the Pickini concept with a more recent PIC controller.
The attempt I made with an Arduino Nano was not a success. The Arduino can be used as a programmable pulse generator (PWM), but the analog comparators and clock (16 MHz) were insufficient.

[dbanner]

With the PIC18F16Q41 you have a clock speed of 64 MHz = timer resolution of 16 ns. Which doubles the resolution of Pickini V4
You can gate TMR1 with the comparator outputs.
The comparators should have hysteresis.

Looks very promising.
If I had time I would redesign the Pickini concept with a more recent PIC controller.
The attempt I made with an Arduino Nano was not a success. The Arduino can be used as a programmable pulse generator (PWM), but the analog comparators and clock (16 MHz) were insufficient.

Thanks.

[kiouijki]

New free web space found:

http://www.projects.byethost31.com/MD/pickini_en/V4/intro.html

thanks

[BC547]

@dbanner

Also to implement some sort of automatic GEB. Or ground substraction.

You could take a couple of late samples with the ADC of the steady state DC value of the signal.
Then adapt the slicing level to the comparators accordingly: eg keep the slicing level a steady 0.5V lower than the "ground" level.
Slicing voltage = 10bit PWM output + RC filter ( like in Pickini V4).

If you want to do automatic DC level setup at startup = DC offset level of the opamps, do not use a DAC output like I did in Pickini V4.
The DAC output only had 31 levels and switching from one level to another caused a major jump at the opamp output - to be compensated in software by a huge delay ( 1 second ) between each step.

- Bernard

[dbanner]

@dbanner



You could take a couple of late samples with the ADC of the steady state DC value of the signal.
Then adapt the slicing level to the comparators accordingly: eg keep the slicing level a steady 0.5V lower than the "ground" level.
Slicing voltage = 10bit PWM output + RC filter ( like in Pickini V4).

If you want to do automatic DC level setup at startup = DC offset level of the opamps, do not use a DAC output like I did in Pickini V4.
The DAC output only had 31 levels and switching from one level to another caused a major jump at the opamp output - to be compensated in software by a huge delay ( 1 second ) between each step.

- Bernard

I did a basic schematic, most of which is taken from well known Bi-Polar PI scheme. This is just for the concept (the schematic is not complete, and is missing some important parts). The initial firmware will be simple just to see if the darn thing will work at all. It belongs in a different thread though.


Thanks.

[BC547]

Since I don't see any external RC filter to use a PWM output as the comparator slicing level, I assume you will be using the internal DAC for this ?
The 16F1824 only had 5 bits for the DAC level, but this PIC seems to have a programmable number of bits for the DAC output?

Anything you can do with the internal opamp ?

And use the NCO for audio generation ?

[dbanner]

Since I don't see any external RC filter to use a PWM output as the comparator slicing level, I assume you will be using the internal DAC for this ?
The 16F1824 only had 5 bits for the DAC level, but this PIC seems to have a programmable number of bits for the DAC output?

Anything you can do with the internal opamp ?

And use the NCO for audio generation ?

Internal DAC.

Best use case for the Internal Op-Amp: Use the internal OPA1 module as a programmable unity-gain buffer for the sensitivity potentiometer input.

The NCO runs completely independently of the CPU core. The CPU runs a single line of math to convert the target into a new NCO pitch increment value. So that is very good. Maybe even implement a Bipolar VCO Tone Response.

Thank you for pointing out the NCO. I thought it would have to be done the old way.(timer interrupt) or external VCXO



[ATTACH]n453473[/ATTACH]

[BC547]

dbanner


Is the polarity of D1/D2 correct ?

Q5 gate connection ?

Are C13 / C14 needed when TXP and TXN are direct PIC outputs ? and D12 / D13 ?

One issue I had with the PIC16F1824 was the pullup resistor at the MCLR pin - pin 4.
Together with the pullup I had to add a 100nF to ground.
Everything was fine on the test bench, but during field tests the controller would reset when I touched the coil to wet ground/grass. The extra 100nF to ground took care of this issue.
No idea if this is also a problem with this newer PIC.
Note that you can use pin4 as the pushbutton input. The 100 nF to ground has an extra advantage in taking care of debouncing.

Many free pins - maybe add a LED array ?

I also did some tests with a 128x64 OLED display connected via I2C to the PIC.
A nice feature, but slow - screen update - compared to a direct LED array or parallel character display.
And I also had only 2 limited character sets onboard the 16F1824 due to the program memory limitations.

Looking forward to see the first results f

[Detectorist#1]

Hi,
The correct schematic is in ITMD3 - project pulse 5. Dbanner mention his proposal is only principal. If instead the voltages +5V and -5V are used +2.5V and -2.5V (with LM317L and LM337L), and RX stages use MCP6022-I/P RRIO OpAmps (2.5-5.5V, 10MHz_7V/us), the connections to uP will be very easy. The uP will be supplied from +2.5V and -2.5V.The connection to LM386 sound amplifier have to be AC type. All other functions will be in firmware (will be need more power uP for good results).

[dbanner]

In a time-domain pulse induction metal detector, the DAC's job is to generate the precise slicing level reference voltage. This reference voltage acts as a razor-thin tripwire line just above the noise floor. When the high-voltage coil flyback pulse decays and drops below this exact DAC voltage level, the internal comparator trips, allowing the timer to calculate the target pulse width (dt). Here is my understanding of how the code will work: to generate the slicing level:

Remember I am using a bi-polar TX drive

DAC Bit Depth: 8-Bit Dual Cores (Precision 256 Steps)(PIC18F16Q41)

DAC1 directly to the internal positive input of Comparator 1

DAC2 directly to the internal positive input of Comparator 2

The slicing voltage stays completely inside the chip. Resolution is 19.53mV per step(5V)

The 12-bit ADC fires a rapid, hardware-averaged 16-sample burst reading across the VOP and VON signal paths. This lets the firmware know exactly where the analog baseline is resting during the "quiet" period after the coil flyback and all target eddy currents have decayed completely to zero.

Next, the firmware reads the voltage coming from the 10kΩ linear sensitivity potentiometer via the ADC. If the user turns the knob all the way up, it means they want maximum depth, so the slicing level needs to sit as close to the baseline as possible.

Now, the code combines these two real-time values:
DAC1 slicing level (VOP) = VOP baseline + sensitivity offset
DAC2 slicing level (VON) = VON baseline + sensitivity offset


VOP slicing level:

Real-Time 12-Bit ADC Baseline Capture

Math Equation: Baseline + Sensitivity Offset

Write Number directly to Register: DAC1CON

Internal Silicon Core routes slicing level tripwire to Comparator 1

repeat for VON

Because this entire calculation and register update takes less than a single microsecond, the firmware does it seamlessly once per pulse cycle (up to 1,000 times a second). If a wave sweeps over the sand or the battery supply dips, the baseline shifts, the ADC catches it instantly, and the DAC dynamically recalculates the new slicing height for the very next pulse. There are absolutely no voltage jumps across external capacitors, meaning zero blind settlement delays and perfect real-time drift immunity!

At least in theory!



================================================== ==============
TRANSMIT CYCLE - NET VOLTAGE AT MCU - ACTIVE INTERNAL COMPARATOR
================================================== ==============
Cycle A (Positive) - VOP is POSITIVE (>0V) - COMPARATOR 1 processes VOP.

VON is Negative (<0V) - (Comparator 2 ignores the clipped VON line).

Cycle B (Negative) - VOP is Negative (<0V) - (Comparator 1 ignores the clipped VOP line).

VON is POSITIVE (>0V) - COMPARATOR 2 processes VON.

Also, to run a proper subtractive ground balance loop, the firmware must capture the decay time width (dt) at two distinct signal heights within the exact same pulse window: an Early Sample (t₁) and a Late Sample (t₂)
Because the PIC18F16Q41 features twin peripheral sets, the software configures them to act as two independent stopwatches running in parallel.

[Detectorist#1]

Also, it is possible to set the supply voltages of uP's part to +1.65 and -1.65V with LM317L and LM337L. This will allow to use DSP microchip's processors with 12bit (16bit with oversampling) ADC inside and 3.3V supply. In the same time, have possibility to use the same type of front-end OpAmps -MCP6022-I/P. The challenge is moved to real time programming - early or late, this is the future in the designs of good PI detectors from DIY people. I hope, AI will help for us in these efforts!

[Detectorist#1]

Hi,
The dream of an ultra-simple, high-performance PI metal detector with microprocessor control lives on for DIY people! The exponential interest for this topic in last days confirms this!