Delta Pulse

[Andy_F]

Dear Nicolae,

Thanks for interesting oscillograms. I will look in practice. Earlier results did not please .

P.S. LTSpice I do not use.

[nick_f]

"Resistor optimisation" in this case - manipulation, attempt to give out wished for the valid. To compare it is necessary identical schemes.

Dear Andy,

I was quite undecided after reading your affirmation that the series diode with the MOSFET doesn't affect the circuit in a positive way. You said at most if worsens the results. In my previous experiments, I noticed a good improvement of the pulse width. I decided to repeat the experiment and document the results. It shows you are not right. I don't have an explanation why the diode makes the circuit faster, maybe somebody can help us. Besides that, if the diode would not be required, why would Minelab use it in SD2000?

Please note this is the test on the real circuit! Feel free to repeat my test and post your results.
The simulation shows some similarities, but it is not as clear as the real test.
The attached images are:
1. Test of the circuit with 1N4937 diode and the damping resistor optimised for the shortest pulse width, at testpoint TP3.
2. Test of the circuit without diode and the damping resistor left as in test # 1. Waveform also read at testpoint TP3. You can notice the damping is not optimal anymore and we need to readjust the damping resistor (to lower its value)
3. Test of the circuit without diode and the damping resistor optimised for the shortest pulse width, at testpoint TP3. I had to reduce the value of the damping resistor and this resulted in a longer width.
These three tests indicate quite clearly the diode has a beneficial effect in reducing the pulse width at TP3.

4. This is the image of my LTSpice simulation. I attach the circuit in here, for anybody to check.

Regards,
Nicolae

switching TX-stage

Hi,all !!!

Did any of you used fast switching high voltage blocking IGBT, for exmample 4N60E
instead of IRF 740,840 etc.???

There are:

4N60E:
------
1. Input Capacitance Cies 342 pF
2. Output Capacitance Coes 40 pF
3. Reverse Transfer Cap. Cres 3 pF

SWITCHING

4.Turn–On Delay td(on) 34 ns
5.Rise Time tr 30 ns
6.Turn–Off Delay td(off) 36 ns
7.Fall Time tf 216 ns

Turn–Off Switching Loss Eoff 0.10-0.15 mJ

measured at [Vcc=360 Vdc, Ic=3 Adc,Vge=15 Vdc,L=300 uH,RG=20 om]
--------------------------------------------------------------------

IRF840:
-------
1. Input Capacitance Cies 1.3 nF
2. Output Capacitance Coes 200 pF
3. Reverse Transfer Cap. Cres 18 pF

SWITCHING

4.Turn–On Delay td(on) 19 ns
5.Rise Time tr 11 ns
6.Turn–Off Delay td(off) 11 ns
7.Fall Time tf 11 ns

measured at [Vcc=250Vdc, ID=4.3Adc, VGS= 10Vdc, L=100uH,RG = 4.7om]
with dumpimg fet

D to uper point of coil +Vcc
G--[25om]--S on lower point of Coil, Drain of Swiching Fet
------------------------------------------------------------
I need a precise measured timings in TX-stage not simulated !!!

Thanks all !!!

[Tinkerer]

This thread has been very educational.
People of how many nationalities have taken part in the conversation?
Conversation has originated in how many different countries?
It shows how we can exchange ideas and compare results within minutes around the world.
It also shows how difficult it is to work on a global level.
The language barrier has been much reduced but it is still there, we end up comparing apples with oranges, potatoes and cabbage, but at least we can communicate.
Thanks to Carl for having created and maintained this Forum.

Tinkerer

[Andy_F]

This last test is flawed because you have made no attempt to optimize damping resistors.

"Resistor optimisation" in this case - manipulation, attempt to give out wished for the valid. To compare it is necessary identical schemes.

[okantex]

hi ,
I need help ,today I connected battery with diverse polarity that I blow up something.

my delta give intersting sounds. does not see metal.
I tocuh voltmeter to coil outputs but no change at screen.

I changed mosfet , ,chaneged burned 4001 by 4148 ,also changed 556 but still there is no change

thanks for helps

[porkluvr]

This last test is flawed because you have made no attempt to optimize damping resistors. But that's OK because we're comparing apples and oranges anyway. I will grant you decay rate (with diode) slows near the end so that the ends of the two curves nearly coincide.
And yep, it looks like the diode doesn't become reverse biased until after most of the coil current has already decayed. That means I'm lacking an explanation for increase in di/dt.

The advantages I touted are quickly being whittled down.
1) There's no improvement in supply current for equal coil currents at cutoff. The FET/diode requires a slightly longer energizing period because of diode loss.
2) Initial quicker discharge rate slows until there is no advantage in time at which a sample can be made (coil voltage in the microvolts range).
3) No appreciable improvement when long pulsewidths are used.
(This probably means wasted power in the DP.)

There are some tangible benefits from adding a diode -with short pulses
1) A larger value damping resistor is possible with the diode.
2) Faster initial coil current decay which equates to more power delivered to the target - for equal coil currents at turnoff.

Now, whether these factors make up for losing power in the diode - who knows.
Looking at the voltage waveform tells you little about flyback current. Look at the current waveform.

Alright, don't use the series diode in your Delta Pulse because any benefit is very debatable.

[Andy_F]

But we will return to the main question.
For processing used the place, where voltage of flayback is a millivolt and less. We will consider, that occurs in this place. For this purpose we take the scheme with the diode and without the diode.






Doubtless victory of a variant without the diode!

[Andy_F]

Thus, we generally do not let the "parasitic Diode of the Mosfet" conduct, since it adds 2 or 3 uS to the delay.

Well. We will replace IRF840 with an ideal switch.

It is visible, that presence of the parasitic diode considerably worsens a situation. By the way, with IRF740 will be even worse.

[Tinkerer]

[QUOTE=Andy_F;89273]1. Parasitic diode of MOSFET (sometimes it wrongly name protective) has the voltage of breakdown equal to parametre VDSS of MOSFET. This diode limits an impulse at level VDSS (as stabilitron). For IRF740 VDSS = 400V, for IRF840 VDSS = 500V, e.t.c. On the graphic by me the effect of restriction of an impulse at level ~500V is well visible. While the parasitic diode is punched, the external diode will be opened.

2. The charge of parasitic capacity MOSFET does not occur instantly, this capacity with resistance of the open diode forms the RC-filter.

3. In the presence of a simulator it is all it is possible not to discuss, and simply to look, when the diode is opened

The diode is really closed near to the end flayback, it is not a lot of advantage of it. At the same time harm from it is obvious.

Last graphic - the same, as previous, in logarithmic scale. That it was visible, that the diode is really opened (forward bias > 0,7V).


Once again you are right and now I see why we differ in opinion.
When we try to get to the minimum delays, 5 to 10uS, we consider every fraction of a uS important.
Thus, we generally do not let the "parasitic Diode of the Mosfet" conduct, since it adds 2 or 3 uS to the delay.
Adding to that another 2-3 uS saved for the diode at the drain, it looks to us as an important gain.
Very short delays are most important when looking for nuggets or fine gold jewelry (like a thin ladies engagement ring with a 5 carat Diamond) or like gold chains, where the detector only detects a single link.

All the best

Tinkerer

[Andy_F]

The Flyback has 2 polarities. First the diode is forward biased, until the Flyback reaches its peak. Lets consider this peak is at 500V.

1. Parasitic diode of MOSFET (sometimes it wrongly name protective) has the voltage of breakdown equal to parametre VDSS of MOSFET. This diode limits an impulse at level VDSS (as stabilitron). For IRF740 VDSS = 400V, for IRF840 VDSS = 500V, e.t.c. On the graphic by me the effect of restriction of an impulse at level ~500V is well visible. While the parasitic diode is punched, the external diode will be opened.

2. The charge of parasitic capacity MOSFET does not occur instantly, this capacity with resistance of the open diode forms the RC-filter.

3. In the presence of a simulator it is all it is possible not to discuss, and simply to look, when the diode is opened

The diode is really closed near to the end flayback, it is not a lot of advantage of it. At the same time harm from it is obvious.

Last graphic - the same, as previous, in logarithmic scale. That it was visible, that the diode is really opened (forward bias > 0,7V).

[Tinkerer]

Hi Andy_F,

you are right. Porkluvr is right. And I am right too. We are looking at the problem from different angles.

The Flyback has 2 polarities. First the diode is forward biased, until the Flyback reaches its peak.
Lets consider this peak is at 500V.
The Mosfet drain capacitance is therefore charged to 500V. A certain amount of the Flyback energy is transferred to the Mosfet drain capacitance.

After the Flyback has reached its peak, it starts to decay. The diode is now reverse biased. the Mosfet capacitance can not discharge.
The Mosfet capacitance is now effectively isolated from the coil. If you measure the voltage at the Mosfet drain, it stays at 500V.

The coil now has less energy to discharge so it does it faster.
The inductance part of the coil energy discharges at L/R.
The capacitance part of the coil energy discharges at C*R. So a reduction of the capacitance is effective in reducing the decay time.

The difference will be most notable if the Mosfet Drain capacitance is large and the coil energy is relatively low.

All the best

Tinkerer

[Andy_F]

A reverse biased diode is equivalent to an open switch at DC, but it has capacitance. That is why varactor (tuning) diodes work.
When you reverse bias the diode, there is essentially no DC current flow - but the junction capacitance varies with reverse voltage.
<....>
This capacitance is in series with the FET capacitance, and is useful because it reduces overall capacitance during flyback.

All it is correct, all it is very good .
Problem in that the diode is direct biased (not reverse) during flayback.

Drawing 1. without the diode, with the slow diode, with the fast diode:



Drawing 2. Results of modelling. Flayback with fast and with slow diodes is equivalent (speed of the diode is indifferent). Schemes with diodes have the smaller energy reserved in the coil (because of losses on the diode), illusion of therefore is created that the impulse with diodes is slightly shorter. No advantage of the diode is present (except harm) .

[porkluvr]

retraction

Thanks, Tinkerer. I didn't know what I looking at.

Andy_F, I ran some side-by-side tests with and without UG5JG diode.

Tests set up so that coil currents are equal instead of equalizing voltage peaks. That was my mistake before.

The side with the diode uses about 11% more current than the side without the diode. Sooo, must tradeoff less power consumption for faster di/dt (plus higher damping resistor)?

From those tests I don't see how power consumption is improved with the diode. That was wrong.

(Bad porkluvr)

[Tinkerer]

Yes I did open my big mouth and make some somewhat exagerated claims, but no I'm not wrong*. Let me try to explain.
You are forgetting about PN junction capacitance.

A reverse biased diode is equivalent to an open switch at DC, but it has capacitance. That is why varactor (tuning) diodes work.
When you reverse bias the diode, there is essentially no DC current flow - but the junction capacitance varies with reverse voltage.
Without this effect FM radio technology would be in the stone age. There would be no CDMA cell phones or frequency hopping.
This capacitance is in series with the FET capacitance, and is useful because it reduces overall capacitance during flyback.
A typical Fast Recovery diode will have a whole lot less capacitance than the drain capacitance of an IRF740 FET.
The total capacitance seen looking back into the FET will be much lower when the diode is added in series.

Now, you are right about the 0.7V drop affecting charge time. But for target illumination we are mainly concerned with discharge time.
Exactly how much faster the flyback occurs will depend on several factor. Coil and FET used will affect how much difference adding a diode
will make, but I believe (from my limited testing) that you will see the most substantial decrease in flyback times when the coil current
is at relatively lower values. If you are pulsing three or four amps you will see little difference in flyback time, but if you pulse 1-1/2 amps
there can be a substantial difference. Of course I have not tested all coil and FET combinations, but I don't think adding a
FR diode will ever slow your flyback rate.

Then, also by adding a FR diode you can use a higher value of damping resistor. Again, the amount of difference depends on several factors,
but can be quite substantial. I have only run limited tests, but adding a FR diode ALWAYS allows a higher damper to be used from
what I've seen. This should increase receiver sensitivity, although I don't know how to quantify the difference.

The 0.7V diode drop can be overcome by slightly lengthening the TX pulse. A very small change in timing resistance will maintain
the same coil current.

*I need to temporarily withdraw my claim of decreased battery supply current because I cannot remember my test setup to make that
conclusion. When I remember what I did I will reassert the statement and come back with proof. "I'll be back". (I just remembered.)

Porkluvr,

I looked at the voltage at the drain of the Mosfet, with a diode connected to the drain. The Flyback voltage stays trapped between drain and diode. this shows that the capacitance of the drain is disconnected from the coil.
When I used high PPS, I added a 56k resistor to ground at the drain, to discharge the capacitance, because it stayed up at several hundred volts, until the next pulse.

Tinkerer