Induction Balance Stuff - Single/Multi Frequency Response, GB, Disc, Measurements, Ideas, Fun, etc.

[pito]

Amplitude of the noise peak to peak

[Aziz]

Amplitude of the noise peak to peak

We can ask the AI and calcutate the noise voltage contribution for different bandwidth demodulation and the limit of signal resolution (nV) next time.
I dont have much time at the moment.

[Aziz]

Hi all,

here is, what Claude Code AI says about the noise analysis.
I have adapted the prompt for my application parameters.

AI-Prompt:

I have a sensor coil of a metal detector with series resistance of Rs=2 Ohm.
I have an ultra-low-noise amplifier with gain of G=200 with input referred
noise density en=0.4 nV/sqrt(Hz). Noise includes the sensor coil resistance.
I have an 24-bit, 192 kHz ADC system with -120 dB noise floor level above 10 kHz.
My ADC's dynamic input voltage range is +/- 2.5V.
My signal operating frequency is 45 kHz.
Amplifier output is fed into the ADC system (AC voltage). I have a block size of 1920 samples.
I have a block processing of 100 blocks per second.
I demodulate my tiny signals in the sensor coil with digital lock-in amplifier (I/Q) with
the internal digital synthetisized clock reference (45 kHz) in each block size.

What is the lowest voltage at the sensor coil, I can detect and process for the block?
With the ultra-low-noise amplifier G=200 and without the amplifier (sensor connected directly
to the ADC system)?
How much is the noise level (Vrms, Vpp) for both configurations?
Make me a comprehensive table for comparison.

Add to the comparison EMA (exponential moving average) to the processed blocks with
Alpha A=0.05. Make me a comprehensive PDF document with formulas, tables of the answers.

See the attached PDF for the AI answers.

[Aziz]

Hi all,

Quote: "Amplifier noise, not gain, is what really matters here..."

See the full AI chat in the zipped html file. Very very interesting.
Sweet spot for amplifier gain G is at 80 - 100 times.
But with figure-8 RX coils (or anti-interference RX coils), we need more gain.
Aziz

[JoyJo]

And when will all the words run out and the first prototype will appear in reality? This topic has been very long, but nothing has changed.

[Aziz]

And when will all the words run out and the first prototype will appear in reality? This topic has been very long, but nothing has changed.

Due to lack of time, I did not solve all the issues yet: Running the op-amp(s) out of specs, less parts, simple design.
The amplifier will be the quietest front-end ever however.

[Aziz]

Hi all,

how to address an amplifier input noise e_n <= 0.3 nV/rt Hz? For a gain of 50 - 200 times?
I am right now at 0.33 nV/rt Hz with ZTX851 (1x NPN).
I am sure, I can go below 0.3 nV this time. With lots of tricks.
I have seen, that the PNP type FZT 951 TA (SMD) is even cheaper than the ZTX851.

Now this goal is easily available now. Vbe matching of two PNP transistors out of 50 pieces makes it possible.
But I have to check it out with a simple noise calculation prediction Excel table.

[Aziz]

Hi all,

yep, it is possible to go below e_n = 0.3 nV/rt Hz. The AI says it.

The best option (the lowest noise) is to use two Vbe matched FZT951TA (SOT-223 housing) PNP transistors.
The FZT951TA cost only 0.53 EUR/piece. But this transistor has the lowest noise easily available today.
Vbe match <= 1 mV at 5 - 6 mA collector current at the same ambient temperature. The matched transistors must be thermally coupled together. So they must have the same temperature.

The trick #1:
Using two matched transistors with 5 mA collector current each is way better than using a single transistor with double the collector current (10 mA).
When Vbe matched, no emitter degeneration resistors needed (to avoid thermal runaway and unbalanced collector currents).
Resistors are evil. They generate huge amount of noise. You can almost hear them.

I have to modify the circuit to operate with two PNP transistors.

There are more tricks, which will help us arriving the final goal.
Anyway, the total power consumption will rise.
Aziz

[Aziz]

Hi all,

I have made an Excel table for predicting the input referred noise e_n for the preamp.
You can see, where the big improvement potential is. And very remarkable fact is, that the op-amp noise contribution of the NE5532 is really very very low.



If we change to two parallel transistors, we are in game for the 0.3 nV/rt Hz challenge.
The zipped Excel table in the attachment is for playing and dreaming of ultra low noise silence.
Cheers

[Aziz]

Hi all,

two matched PNP ZTX951 parallel transistors will get the following predicted input referred noise en according to the Google AI answer.



According to the table, it even makes sense to reduce the collector current a bit as there is not much bigger improvement with higher collector currents.
We don't want to burn much battery energy and to heat the transistors as well.
Nice. I should ask for 3x PNP next time.

Aziz

[Aziz]

Yup,

3x PNP at 3 mA collector current is even better than 2x PNP at 5 mA collector current.

[Aziz]

Hi all,

I couldn't help me. This discrete AC preamp gets below 0.3 nV/rt Hz.

But, it is an heater! Almost 50 mA power consumption at 9 V. Nevertheless, it performs quite well.


Now forget this design.
I am going to use the op-amp design.

Aziz

[Aziz]

Hi all,

paralelling 3 PNP transistors does not give any significant benefits. And matching 3 transistors does cause much work.

Only 2 parallel matched ZTX951 PNP transistors make sense (trick #1). 4 - 5 mA collector current each.

Now the op-amp considerations:
If we want to go down with the preamp gain (50 - 100 x), the op-amp have to source much current (10 - 15 mA). The THD will suffer.
If we do the current sharing trick (trick #2) with two op-amps parallel, thats ok.
We don't really benefit of the parallel op-amp noise reduction by 3 dB as the op-amp noise is totally irrelevant here (2-3 % of total noise).
This is the reason, why a dual op-amp makes sense. It reduces circuit complexity and allowing much more load of the op-amp output.
Perfect for a cheap NE5532.

If we want to go with gain down to 50 or lower, op-amp output current rises (heavy output load, out of spec). Adding a simple push-pull emitter follower output driver adds complexity to the whole circuit and reduces the phase margin for frequency stability further. We have the choice of using rail-to-rail output op-amp and dividing the gain by 2 for the feedback loop (trick #3). So we can reduce the gain feed back resistor Rf2 down to 50 Ohm.
Resistor Rf1 will always be 1 Ohm. We can't get the 0.3 nV/rt Hz level otherwise.

I hope I won't need trick #3.

Aziz

[Aziz]

Hi all,

I couldn't help me once again.

The discrete transistor preamp in post #447 can be modified to work with single 3.7 V Li-Ion cell or 3x 1.2 V Ni-MH cells. Total power consumption will be approx. max. 25 mA.
Instead of the 2xPNP Vbe matching, single PNP ZTX951 could be used. No Vbe matching required at all.

Single PNP solution will still get e_n of 0.3 nV/rt Hz (0.295 nV/rt Hz). THD will be slightly worse due to reduced voltage span.

We would have enough energy in the battery.

I wonder, whether this preamp will do the job too. Regardless of offset voltage variation (irrelevant, AC output) and gain variation (< 0.3 %) over temperature change (delta Temp 20 °C).

This preamp circuit is a nice KISS solution however.
I will think of to realize and test it.
Aziz

[Aziz]

BTW,

I have been inspired by the "Rutherford" circuit solution on page 33.
Link to site: https://www.hifisonix.com/articles/m...it-compendium/
Link to pdf: https://hifisonix.com/wp-content/upl...amps-rev-2.pdf

I have just modified the preamp for the PNP ZTX951 transistor. So changed and adapted.

It is remarkable, that the output stage (NPN) is being part of the feedback loop.
I haven't seen this before.
Aziz