New Bipolar Boost TX and Front End

[Mdtoday]

Great... the 15V for the re-configured TX draws < 15mA. The 20V also draws < 15mA. So I think we can use the 20/15 volt circuits as they are with maybe a little bit of tantalum storage for the 15V line. The total draw on the 20V should be around 50mA when you take in consideration the 15V regulator.Do you want to follow through and test that feasibility or do you want me to do it?

Sorry, missed this post, I don't mind doing it but probably wont get to it tonight until late..

[KingJL]

Sorry, missed this post, I don't mind doing it but probably wont get to it tonight until late..

No need to rush... I will make the changes in the FPGA and it will be ready and waiting. This does not need to impact our current project testing, but can go on in parallel as time permits.

[Mdtoday]

No need to rush... I will make the changes in the FPGA and it will be ready and waiting. This does not need to impact our current project testing, but can go on in parallel as time permits.

Not a problem JL, thanks, last minute urgent customer jobs, always land 2 days before holiday period.

[KingJL]

... but the sim shouts Time step too small schmitt instance TX(ADuM)_RX(THAT))

@eclipse, did the updated zip and recheck of settings resolve your "Time step too small" issue. I am now running with the ".option Gmin=1e-010" commented out ( using the Contro Panel>SPICE defaults with "Normal" solver).

[Mdtoday]

@JL, The TX(ADuM)_RX(THAT)) version appears to be missing the .asy and .sub for the THAT1512.

[KingJL]

@JL, The TX(ADuM)_RX(THAT)) version appears to be missing the .asy and .sub for the THAT1512.

Thank you @Mdtoday for checking them out... Hopefully, all needed files for the sim are now there. My problem is that since I use some of these elsewhere, I have them in the global library,,, that LtSpice seems to update frequently!

Newest zip of sim files

[Mdtoday]

Thank you @Mdtoday for checking them out... Hopefully, all needed files for the sim are now there. My problem is that since I use some of these elsewhere, I have them in the global library,,, that LtSpice seems to update frequently!

Newest zip of sim files

Thanks JL, much appreciated. I will try them out now.

[Mdtoday]

Thanks JL, much appreciated. I will try them out now.

@JL all work fine now, thank you.

[KingJL]

ADuM4120 variants

The ADuM4120 comes in 6 different variants/grades. The different grades/variants affect the Vdd2 Under Voltage LockOut (UVLO):
ADuM4120A - UVLO = 4.4V w/glitch filter;
ADuM4120B - UVLO = 7.3V w/glitch filter;
ADuM4120C - UVLO = 11.3V w/glitch filter;
ADuM4120-1A - UVLO = 4.4V w/o glitch filter;
ADuM4120-1B - UVLO = 7.3V w/o glitch filter;
ADuM4120-1C - UVLO = 11.3V w/o glitch filter;

The most critical place in our application is the damp switch MOSFETs. The capacitor supplying the vdd2 voltage needs to build up a charge to overcome the UVLO. And simulations indicate that the charge never exceeds 10V. The glitch filter does not seems to have no effect in our application. The B version should work in the application but, damping will be delayed until UVLO is overcome. The A grade will always work. Something that we must remember when we go to actual hardware with the updated TX design and order the right part.

[KingJL]

... [ATTACH]48717[/ATTACH]

That is affected by the Dw parameter. I suggest setting the parameters as stated in post #576 (in both simulations). That should fix the problem... also do not consider the results before at least 8 ms as the boost build-up is not stable until then.

[KingJL]

That is affected by the Dw parameter. I suggest setting the parameters as stated in post #576 (in both simulations). That should fix the problem... also do not consider the results before at least 8 ms as the boost build-up is not stable until then.

set the Dw parameter to 2.84u and it should switch positive (it actually switches positve at 2.85u).

The dual JFET version runs slower... this is due to the opa828 subcircuit. I have noticed that TI subcircuits really tax LtSpice... I think the TI models are more complex and computational intensive.

[Mdtoday]

The ADuM4120 comes in 6 different variants/grades. The different grades/variants affect the Vdd2 Under Voltage LockOut (UVLO):
ADuM4120A - UVLO = 4.4V w/glitch filter;
ADuM4120B - UVLO = 7.3V w/glitch filter;
ADuM4120C - UVLO = 11.3V w/glitch filter;
ADuM4120-1A - UVLO = 4.4V w/o glitch filter;
ADuM4120-1B - UVLO = 7.3V w/o glitch filter;
ADuM4120-1C - UVLO = 11.3V w/o glitch filter;

The most critical place in our application is the damp switch MOSFETs. The capacitor supplying the vdd2 voltage needs to build up a charge to overcome the UVLO. And simulations indicate that the charge never exceeds 10V. The glitch filter does not seems to have no effect in our application. The B version should work in the application but, damping will be delayed until UVLO is overcome. The A grade will always work. Something that we must remember when we go to actual hardware with the updated TX design and order the right part.

I was actually just looking at the data sheets , suppliers etc on the ADuM4120 and noticed the different variants

[eclipse]

Thanks it was the LTSpice version. After the upgrade to 03 Dec 2019 I was able to run it.
I'm definitely building this. I'll be using my processor and analog circuitry to get this closer to my knowledge.

[KingJL]

@Mdtoday, Is there a possibility to have a more robust 20V supply? Here is my thinking... After moving to ADuM4120's for the TX boost and damp MOSFETs, remove the remaining EL7202 (TXA and TXB) and replace it with two ADUM4120's, one for TXA and one for TXB. This has a few advantages: (1) it matches the propagation delays between TXA, TXB, TXA_boost, TXB_boost. This maximizes the efficiency of the boost... currently the ADuM4120,s require a 10 nsec delay to get close to synchronization with the EL7202. 10ns does not quite match the delay needed, but 10 ns is the minimum granularity of the FPGA. (2) It removes the need for the 15V regulator. (3) we could take the 20V input through a inrush protection and isolation diode to a 220uF storage tank and use this voltage as the Vdd2 for the ADuM4120 and for the feeding the boost. This ~18.5V Vdd2 ends up achieving about 14V MOSFET drive for the TX boost MOSFET(s) and the damp MOSFET(s) and 18.5V for the TX MOSFET(s). This makes it so that all grades of the ADuM4120 can be used.

I can take the inrush current limiter that is now in the 5V circuit (it is really not needed now) and put it to the 20V circuit (need to boost the 20V by 1.25V to compensate for the loss across the inrush current limiter). I can remove the 15V regulator circuit. We can set the inrush current limit to about 450mA to allow for initial charging of the storage tank in a somewhat timely fashion (6-8 ms). After the tank is charged the Vdd2 (for all 6 ADuM4120's) current draw and boost supply is only about 40mA. It is only for the inrush that we need to have the capability of ~450mA.

I do not know if the MT3608 can handle the switch current (not sure if the internal switch current is automatically limited) that would be needed for the inrush, but a similar IC (LT1935) can. I have modeled it using your current 22uH inductor and using blanking for 20% of PRT. I am not sure what we need for the 20V regulator.

[Mdtoday]

@Mdtoday, Is there a possibility to have a more robust 20V supply? Here is my thinking... After moving to ADuM4120's for the TX boost and damp MOSFETs, remove the remaining EL7202 (TXA and TXB) and replace it with two ADUM4120's, one for TXA and one for TXB. This has a few advantages: (1) it matches the propagation delays between TXA, TXB, TXA_boost, TXB_boost. This maximizes the efficiency of the boost... currently the ADuM4120,s require a 10 nsec delay to get close to synchronization with the EL7202. 10ns does not quite match the delay needed, but 10 ns is the minimum granularity of the FPGA. (2) It removes the need for the 15V regulator. (3) we could take the 20V input through a inrush protection and isolation diode to a 220uF storage tank and use this voltage as the Vdd2 for the ADuM4120 and for the feeding the boost. This ~18.5V Vdd2 ends up achieving about 14V MOSFET drive for the TX boost MOSFET(s) and the damp MOSFET(s) and 18.5V for the TX MOSFET(s). This makes it so that all grades of the ADuM4120 can be used.

I can take the inrush current limiter that is now in the 5V circuit (it is really not needed now) and put it to the 20V circuit (need to boost the 20V by 1.25V to compensate for the loss across the inrush current limiter). I can remove the 15V regulator circuit. We can set the inrush current limit to about 450mA to allow for initial charging of the storage tank in a somewhat timely fashion (6-8 ms). After the tank is charged the Vdd2 (for all 6 ADuM4120's) current draw and boost supply is only about 40mA. It is only for the inrush that we need to have the capability of ~450mA.

I do not know if the MT3608 can handle the switch current (not sure if the internal switch current is automatically limited) that would be needed for the inrush, but a similar IC (LT1935) can. I have modeled it using your current 22uH inductor and using blanking for 20% of PRT. I am not sure what we need for the 20V regulator.

This sounds like a very good idea. I like it a lot.
I currently use the LT1371 in a number of circuits and have a design ready to go, I have a few rails of this device too.
The device is good for 3 amps, current limiting and soft start. Its been a nice reliable part for me.
We probably won't require the inrush limiter using this device.