New Bipolar Boost TX and Front End

[Mdtoday]

As I suspected, M6 is wrong... I fouled up an swaped the inputs to the EL7202,s for the M6_G and M7_G. I have a fix r4eady for the Vivado project that will fix rhis. It involved switching the ports around in the FPGA constraints file. Will put up the link to it in another post.

Here is the timing as per latest Vivado project changes, I will post more later today, only have my handheld scope with me atm.

[KingJL]

Here is the timing as per latest Vivado project changes, I will post more later today, only have my handheld scope with me atm.

[ATTACH]48517[/ATTACH]

The timing and polarity of signals are now correct. I am concered by the amount of M6_G droop. Because of Probe or something else?
Amplitude (initial) is OK. If it isn't something bleeding off the signal, we may need to try to improve the droop. I believe in the vallon, the equivalent resistor as R25, R31, R35 & R40 was 13 Meg vs our 2.2Meg and the capacitors C29, 32, C35, C38 were 5n6 vs our 2n2.

If you have some 5n6 and say maybe 10 meg we could try and see if it improves... I would try the M6 and M7 drivers 1rst and if all is well update the M1 & M3 drivers later.

[Mdtoday]

The timing and polarity of signals are now correct. I am concered by the amount of M6_G droop. Because of Probe or something else?
Amplitude (initial) is OK. If it isn't something bleeding off the signal, we may need to try to improve the droop. I believe in the vallon, the equivalent resistor as R25, R31, R35 & R40 was 13 Meg vs our 2.2Meg and the capacitors C29, 32, C35, C38 were 5n6 vs our 2n2.

If you have some 5n6 and say maybe 10 meg we could try and see if it improves... I would try the M6 and M7 drivers 1rst and if all is well update the M1 & M3 drivers later.

The probes I used are my toolbox ones, I did a quick check and they look ok with the dso reference but they are not my goto probes.
I will repeat the tests again later today back at good dso/probes and will replace those components, I have those values

[Mdtoday]

The probes I used are my toolbox ones, I did a quick check and they look ok with the dso reference but they are not my goto probes.
I will repeat the tests again later today back at good dso/probes and will replace those components, I have those values

I forgot to mention, the measurement was referenced to gnd

[KingJL]

I forgot to mention, the measurement was referenced to gnd

That could make a difference.

[Mdtoday]

The probes I used are my toolbox ones, I did a quick check and they look ok with the dso reference but they are not my goto probes.
I will repeat the tests again later today back at good dso/probes and will replace those components, I have those values

I have taken more measurements tonight on my bench DSO/probe set. The apparent droop displayed in post 511, is a probe issue.
All measurements across G/S.The droop on average is 1v
Note that T1,T2 (Boost) have 16 and 18 turn secondaries respectively, while T3,T4 secondaries were the original 14 turns.






Last image was of the waveform on M6 with R35=10M / C35 = 4n7 the droop improved by approx 0.5v but the voltage swing was reduced quite a bit.

I re-installed the 2.2Meg /3.3nF combination for the 4 tests above.
Next I will finish off winding 2 more transformers for T3,T4 to match T1,T2

Oh and I think it's time to throw out 2 probes from my mobile kit, they have had a good innings!

[KingJL]

Last image was of the waveform on M6 with R35=10M / C35 = 4n7 the droop improved by approx 0.5v but the voltage swing was reduced quite a bit.
[ATTACH]48526[/ATTACH]

I think the apparent "reduced" voltage swing was because only M6 was modified. Was the M6_10M_4n7 taken across GS or G gnd. The voltage swing actually increased for the M6 side (13v vs 10V). The other swing was reduced from 10 to about 8. I think that is because the base signal is being fed through the damp resistor during the alternate TX (A/B) cycle time.

[Mdtoday]

I think the apparent "reduced" voltage swing was because only M6 was modified. Was the M6_10M_4n7 taken across GS or G gnd. The voltage swing actually increased for the M6 side (13v vs 10V). The other swing was reduced from 10 to about 8. I think that is because the base signal is being fed through the damp resistor during the alternate TX (A/B) cycle time.

Yes, this would make sense, I will repeat the test with both modified.
The measurement was taken across GS
I have been meaning to capture all 4 points at once to get a good visual on whats going on. I will do this later today.

[Mdtoday]

Yes, this would make sense, I will repeat the test with both modified.
The measurement was taken across GS
I have been meaning to capture all 4 points at once to get a good visual on whats going on. I will do this later today.

@JL, I was about to solder a group of wires from the logic outputs on the IF connector out to a larger .1" connector on a small board so I can hook my HP logic analyser up.
That got me thinking. As we are not using the PMOD ports on the Nextion version, we could use those pins on the IF board and duplicate the logic signals to them. What are your thoughts?

[KingJL]

@JL, I was about to solder a group of wires from the logic outputs on the IF connector out to a larger .1" connector on a small board so I can hook my HP logic analyser up.
That got me thinking. As we are not using the PMOD ports on the Nextion version, we could use those pins on the IF board and duplicate the logic signals to them. What are your thoughts?

Yes, we could do that... without soldering anything! I can easily modify the Bipolar_PI.vhd to do this... I have to add an interface signal for each output port as VHDL will not allow read of an out port. That and some entries in the restraint file and we are done. Give me a day or so when I get back to TN (Moday evening) and I will regenerate a project archive with that interface defined.

[Mdtoday]

Yes, we could do that... without soldering anything! I can easily modify the Bipolar_PI.vhd to do this... I have to add an interface signal for each output port as VHDL will not allow read of an out port. That and some entries in the restraint file and we are done. Give me a day or so when I get back to TN (Moday evening) and I will regenerate a project archive with that interface defined.

Excellent, thanks JL.

[KingJL]

New project archive

Yes, we could do that... without soldering anything! I can easily modify the Bipolar_PI.vhd to do this... I have to add an interface signal for each output port as VHDL will not allow read of an out port. That and some entries in the restraint file and we are done. Give me a day or so when I get back to TN (Moday evening) and I will regenerate a project archive with that interface defined.

Well, I got a few minutes free and went ahead and implemented the availability of timing signals to the unused PMODs J3 and J4. Changed TX-RX-vhd and Bipolar_Timing.vhd to duplicate all timing signals with a AUX_ prefix. Then modified the constraints file to route these signals to PMOD_J3 and PMOD_J4.

The PMOD pinout for the signals are:
J3-1 = AUX_TXA,
J3-2 = AUX_TXB,
J3-3 = AUX_BSTA_S,
J3-4 = AUX_BSTA_E.
J3-7 = AUX_BSTB_S,
J3-8 = AUX_BSTB_E,
J3-9 = AUX_DAMP_S,
J3-10 = AUX_DAMP_E,
J4-1 = AUX_TX_AB,
J4-2 = AUX_RX_BLK.

PMOD JA is used for communication with the Nextion, probe enable,PDM. The PDM signal may disapear in future versions as we may be using the PWM output from the Nextion.

The surrent block design:


The Changelog:
Change Log.txt

The courrent project archive is Vivado Bipolar_PI _Nextion(11-30-2019).zip

[Mdtoday]

Well, I got a few minutes free and went ahead and implemented the availability of timing signals to the unused PMODs J3 and J4. Changed TX-RX-vhd and Bipolar_Timing.vhd to duplicate all timing signals with a AUX_ prefix. Then modified the constraints file to route these signals to PMOD_J3 and PMOD_J4.

The PMOD pinout for the signals are:
J3-1 = AUX_TXA,
J3-2 = AUX_TXB,
J3-3 = AUX_BSTA_S,
J3-4 = AUX_BSTA_E.
J3-7 = AUX_BSTB_S,
J3-8 = AUX_BSTB_E,
J3-9 = AUX_DAMP_S,
J3-10 = AUX_DAMP_E,
J4-1 = AUX_TX_AB,
J4-2 = AUX_RX_BLK.

PMOD JA is used for communication with the Nextion, probe enable,PDM. The PDM signal may disapear in future versions as we may be using the PWM output from the Nextion.

The surrent block design:
[ATTACH=CONFIG]48554[/ATTACH]

The Changelog:
[ATTACH=CONFIG]48553[/ATTACH]

The courrent project archive is Vivado Bipolar_PI _Nextion(11-30-2019).zip

Excellent work JL, I will apply the changes and post some screen shots, this has saved a lot of time and work!

[Mdtoday]

Well, I got a few minutes free and went ahead and implemented the availability of timing signals to the unused PMODs J3 and J4. Changed TX-RX-vhd and Bipolar_Timing.vhd to duplicate all timing signals with a AUX_ prefix. Then modified the constraints file to route these signals to PMOD_J3 and PMOD_J4.

The PMOD pinout for the signals are:
J3-1 = AUX_TXA,
J3-2 = AUX_TXB,
J3-3 = AUX_BSTA_S,
J3-4 = AUX_BSTA_E.
J3-7 = AUX_BSTB_S,
J3-8 = AUX_BSTB_E,
J3-9 = AUX_DAMP_S,
J3-10 = AUX_DAMP_E,
J4-1 = AUX_TX_AB,
J4-2 = AUX_RX_BLK.

PMOD JA is used for communication with the Nextion, probe enable,PDM. The PDM signal may disapear in future versions as we may be using the PWM output from the Nextion.

@KingJL, I have been busy with restoring my computers and some test gear from power surge damage from blown line transformer.
As Murphy's law would have it, I normally have surge protection on all my work benches but I had set up a temporary area for these latest tests as I pulled out my ancient but trusty HP1630D which takes up a lot of bench space and used an unprotected power block.
Funny thing, The HP survived, 2 computers and some test gear did not.

Now back on deck and had a bit of time to test the latest Vivado project with Aux outputs.
Lucky for me I had the A7 and TX project safely tucked away on another bench and not connected

Two signals are missing
J3-7 = AUX_BSTB_S,
J3-8 = AUX_BSTB_E



All others look good. I will post better screenshots once I have a replacement GPIB interface card (casualty of the power surge)

Checked signals back at the A7 but both Aux_BoostB signals not there either.

[KingJL]

@KingJL, I have been busy with restoring my computers and some test gear from power surge damage from blown line transformer.
As Murphy's law would have it, I normally have surge protection on all my work benches but I had set up a temporary area for these latest tests as I pulled out my ancient but trusty HP1630D which takes up a lot of bench space and used an unprotected power block.
Funny thing, The HP survived, 2 computers and some test gear did not.

Now back on deck and had a bit of time to test the latest Vivado project with Aux outputs.
Lucky for me I had the A7 and TX project safely tucked away on another bench and not connected

Two signals are missing
J3-7 = AUX_BSTB_S,
J3-8 = AUX_BSTB_E

[ATTACH]48575[/ATTACH]

All others look good. I will post better screenshots once I have a replacement GBIP interface card (casualty of the power surge)

Checked signals back at the A7 but both Aux_BoostB signals not there either.

I see the problem... regenerating project now... will post new project archive shortly.